From Hardware Processes to asynchronous circuits via petri nets: An Application to Arbiter Design

International audienceCommunicating Hardware Processes (CHP) is a CSP-like language for describing asynchronous systems as sets of processes interacting via self-timed, handshake, channels. To facilitate the automatic translation of CHP to circuits the paper proposes to use a token-based formalism, Petri nets, as an intermediate model. Petri nets offer an adequate semantic capture for concurrency and choice present in the CHP model and can be formally verified using a variety of existing model-checking tools. On the other hand, they can act as a blueprint for a control circuit implementation, preserving the original behaviour. Petri nets can be translated to circuits either by means of direct mapping or by logic synthesis via the refinement into Signal Transition Graphs. Therefore, this approach is believed to be the way towards provably-correct design flow for asynchronous systems, which is currently missing. This work concentrates on the stage of translating CHP to Petri nets. For this a very challenging application has been selected, which is the problem of designing self-timed arbiters