International audienceWe present a functional model used to specify and validate, in the ACL2 logic, a system on a chip communication architecture named Octagon. The functional model is briey introduced before being developed on the case study. We define and validate the routing algorithm, a simple scheduling algorithm and the correctness of read and write operations which includes the proof that messages travel over the network without being modified and eventually reach their expected destination
Abstract—Multi-Processor Systems-on-Chip (MPSoC) designs are constructed by assembling pre-designed ...
ISBN : 978-2-84813-152-8The current technology allows the integration on a single die of complex sys...
International audienceWe present a generic network on chip model (named GeNoC) intended to serve as ...
International audienceWe present a functional model used to specify and validate, in the ACL2 logic,...
International audienceWe present a functional approach, based on the ACL2 logic, for the specificati...
ISBN :3-540-23738-0We present a functional approach, based on the ACL2 logic, for the specification ...
This paper presents a formal model and a systematic approach to the validation of communication arch...
International audienceThis paper presents a formal model for representing any on-chip communication ...
The current technology allows the integration on a single die of complex systems-on-chip (SoCs) that...
International audienceThe current technology allows the integration on a single die of complex syste...
This paper presents a formal model for representing {it any} on-chip communication architecture. Thi...
Contains fulltext : 76086.pdf (publisher's version ) (Closed access)Eighth Interna...
ISBN: 978-1-60558-231-3International audienceWe describe an enhanced generic model for Networks-on-C...
Most of today's SoC's (Systems on Chips) are made of manufactured IP's interconnected through comple...
International audienceMost of today's SOCs (Systems on Chips) are made of manufactured IP's intercon...
Abstract—Multi-Processor Systems-on-Chip (MPSoC) designs are constructed by assembling pre-designed ...
ISBN : 978-2-84813-152-8The current technology allows the integration on a single die of complex sys...
International audienceWe present a generic network on chip model (named GeNoC) intended to serve as ...
International audienceWe present a functional model used to specify and validate, in the ACL2 logic,...
International audienceWe present a functional approach, based on the ACL2 logic, for the specificati...
ISBN :3-540-23738-0We present a functional approach, based on the ACL2 logic, for the specification ...
This paper presents a formal model and a systematic approach to the validation of communication arch...
International audienceThis paper presents a formal model for representing any on-chip communication ...
The current technology allows the integration on a single die of complex systems-on-chip (SoCs) that...
International audienceThe current technology allows the integration on a single die of complex syste...
This paper presents a formal model for representing {it any} on-chip communication architecture. Thi...
Contains fulltext : 76086.pdf (publisher's version ) (Closed access)Eighth Interna...
ISBN: 978-1-60558-231-3International audienceWe describe an enhanced generic model for Networks-on-C...
Most of today's SoC's (Systems on Chips) are made of manufactured IP's interconnected through comple...
International audienceMost of today's SOCs (Systems on Chips) are made of manufactured IP's intercon...
Abstract—Multi-Processor Systems-on-Chip (MPSoC) designs are constructed by assembling pre-designed ...
ISBN : 978-2-84813-152-8The current technology allows the integration on a single die of complex sys...
International audienceWe present a generic network on chip model (named GeNoC) intended to serve as ...