textSilicon CMOS devices have been scaled down continuously in the last few decades to improve the device performance, increase packing density and reduce cost. To further scale the transistor size below 100nm and achieve device performance improvement, new materials and new device structures have to be developed to meet all the challenges. The growth of high quality strained SiGe films has created new opportunities for the realization of new device structures using bandgap engineering in Si technology. Vertical MOSFETs have been employed in this study because there is more freedom in terms of bandgap engineering in a vertical format and the channel length is not dependent on the lithography. The key challenge in scaling of MOSFETs...
The integration of high voltage power transistors with control circuitry to form smart Power Integra...
A new architecture for a vertical MOS transistor is proposed that incorporates a so-called dielectri...
As scaling continues, the number of transistors per unit area and power density are both on the rise...
textFor over three decades, the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) has succ...
There is a well recognised need to introduce new materials and device architectures to Si technology...
There is a well recognised need to introduce new materials and device architectures to Si technology...
Tremendous progress in information technology has been made possible by the development and optimiza...
textSince the introduction of MOSFETs into the integrated circuit (IC), performance has been improv...
A new orientation to the conventional MOSFET is proposed. Processing issues, as well as short channe...
Vertical MOSFETs are gaining importance for VLSI circuit integration and for reducing the feature si...
As device dimensions are scaled beyond the 45nm node, new device architectures and new materials ne...
The semiconductor industry has largely relied on Moore’s law, based on the observation that every ne...
A vertical MOSFET (VMOST) incorporating an epitaxial channel and a drain junction in a stacked silic...
In this letter, a novel hetero-stacked TFET (HS-TFET) is experimentally demonstrated and optimized f...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
The integration of high voltage power transistors with control circuitry to form smart Power Integra...
A new architecture for a vertical MOS transistor is proposed that incorporates a so-called dielectri...
As scaling continues, the number of transistors per unit area and power density are both on the rise...
textFor over three decades, the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) has succ...
There is a well recognised need to introduce new materials and device architectures to Si technology...
There is a well recognised need to introduce new materials and device architectures to Si technology...
Tremendous progress in information technology has been made possible by the development and optimiza...
textSince the introduction of MOSFETs into the integrated circuit (IC), performance has been improv...
A new orientation to the conventional MOSFET is proposed. Processing issues, as well as short channe...
Vertical MOSFETs are gaining importance for VLSI circuit integration and for reducing the feature si...
As device dimensions are scaled beyond the 45nm node, new device architectures and new materials ne...
The semiconductor industry has largely relied on Moore’s law, based on the observation that every ne...
A vertical MOSFET (VMOST) incorporating an epitaxial channel and a drain junction in a stacked silic...
In this letter, a novel hetero-stacked TFET (HS-TFET) is experimentally demonstrated and optimized f...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
The integration of high voltage power transistors with control circuitry to form smart Power Integra...
A new architecture for a vertical MOS transistor is proposed that incorporates a so-called dielectri...
As scaling continues, the number of transistors per unit area and power density are both on the rise...