The paper presents method for hierarchical configurable Petri nets description in VHDL language. Dual model is an alternative way for behavioral description of the discrete control process. Dual model consists of two correlated models: UML state machine diagram and hierarchical configurable Petri net (HCfgPN). HCfgPN are Petri nets variant with direct support of exceptions handling mechanism. Logical synthesis of dual model is realized by the description of HCfgPN model by means of hardware description language. The paper presents placesoriented method for HCfgPN description in VHDL language
Abstract. This work presents a method for obtaining fail-safe systems based in parity alternation fr...
: The implementation of Hierarchical Timed Petri Net (HTPN) in our system modelling tool yields a hi...
Proces specyfikacji zachowania odgrywa istotną rolę z powodu określania na tym etapie cech i sposobu...
Hierarchical Petri nets beside UML state machine diagrams, sequentional function charts (SFC) and hi...
Parallel controllers can be best specified using a description with a formal support to validate str...
Presents Meta VHDL (MV) a hardware description language based on VHDL with the addition of primitive...
The paper presents method for logic controllers multi context implementation by means of partial rec...
AbstractPetri Net is an important tool to model discrete event system. In this paper, Hardware Descr...
The paper presents a new method of structured encoding of global internal states and events in Recon...
The main purpose of this paper is to present an useful set of hierarchical mechanisms of specificati...
International audienceThis paper deals with the automatic translation of interpreted generalized Pet...
Conferência: 39th Annual Conference of the IEEE Industrial-Electronics-Society (IECON), Vienna, Aust...
International audienceTo design and implement complex digital systems, designers need to have an eff...
Petri Nets are a formal, graphical and executable modeling technique for the specification and analy...
"Series Title: IFIP - The International Federation for Information Processing, ISSN 1868-4238"Petri ...
Abstract. This work presents a method for obtaining fail-safe systems based in parity alternation fr...
: The implementation of Hierarchical Timed Petri Net (HTPN) in our system modelling tool yields a hi...
Proces specyfikacji zachowania odgrywa istotną rolę z powodu określania na tym etapie cech i sposobu...
Hierarchical Petri nets beside UML state machine diagrams, sequentional function charts (SFC) and hi...
Parallel controllers can be best specified using a description with a formal support to validate str...
Presents Meta VHDL (MV) a hardware description language based on VHDL with the addition of primitive...
The paper presents method for logic controllers multi context implementation by means of partial rec...
AbstractPetri Net is an important tool to model discrete event system. In this paper, Hardware Descr...
The paper presents a new method of structured encoding of global internal states and events in Recon...
The main purpose of this paper is to present an useful set of hierarchical mechanisms of specificati...
International audienceThis paper deals with the automatic translation of interpreted generalized Pet...
Conferência: 39th Annual Conference of the IEEE Industrial-Electronics-Society (IECON), Vienna, Aust...
International audienceTo design and implement complex digital systems, designers need to have an eff...
Petri Nets are a formal, graphical and executable modeling technique for the specification and analy...
"Series Title: IFIP - The International Federation for Information Processing, ISSN 1868-4238"Petri ...
Abstract. This work presents a method for obtaining fail-safe systems based in parity alternation fr...
: The implementation of Hierarchical Timed Petri Net (HTPN) in our system modelling tool yields a hi...
Proces specyfikacji zachowania odgrywa istotną rolę z powodu określania na tym etapie cech i sposobu...