Formal modelling of electronic circuits using event-B, Case Study: SAE J1708 Serial Communication Link

Contribution à un ouvrage.Electronic systems become more and more complex and they are now involved in a lot of products. Malfunction of an electronic circuit may have financial consequences or take a heavy tool in human life. Formal methods are needed to ensure correctness of systems. This chapter presents a study of the SAE J1708 Serial Communication link described in. The study is carried out in Event-B, an extension of the B method. The system is implemented and decomposed using step-wise refinement. We present how to derive with this method a cycle-accurate hardware model. The model of the communication link system is composed of an arbitrary, finite, number of identical components that run concurrently. The model contains synchronization of these components required to control access to the communication link. At the end of the refinement we obtain an implementable model of the components which is translated into VHDL. The generated VHDL design is synthesizable, meaning that the implementable B model is synthesizable as well