International audienceNUMA abilities such as explicit migration of memory buffers enable flexible placement of data buffers at runtime near the tasks that actually access them. The move_pages system call may be invoked manually but it achieves limited throughput and implies a strong collaboration of the application. Indeed, the location of threads and their memory access patterns must be carefully known so as to decide when migrating the right memory buffer on time. We present the implementation of a Next-Touch memory placement policy so as to enable automatic dynamic migration of pages when they are actually accessed by a task. We introduce a new PTE flag setup by madvise, and the corresponding Copy-on-Touch codepath in the page-fault hand...
This paper describes transparent mechanisms for emulating some of the data distribution facilities ...
Current high-performance multicore processors provide users with a non-uniform memory access model (...
We propose a lightweight process migration mechanism and an adaptive memory prefetching scheme calle...
NUMA abilities such as explicit migration of mem-ory buffers enable flexible placement of data buffe...
This paper presents user-level dynamic page migration, a runtime technique which transparently enabl...
Virtual memory offers a simple hardware abstraction to programmers freeing them from the tedious pro...
This paper presents algorithms for improving the performance of parallel programs on multiprogrammed...
International audienceExploiting the full computational power of current hierarchical multiprocessor...
Proceedings of the 4th IEEE International Symposium on Network Computing and Applications, NCA 2005,...
A common approach to improve memory access in NUMA machines exploits operating system (OS) page prot...
The performance of multiprogrammed shared-memory multiprocessors suffers often from scheduler interv...
This paper introduces two novel algorithms for thread migrations, named CIMAR (Core-aware Interchang...
International audienceDynamic task-parallel programming models are popular on shared-memory systems,...
Journal ArticleIn future multi-cores, large amounts of delay and power will be spent accessing data...
International audienceThis paper describes a new iso-address approach to the dynamic allocation of d...
This paper describes transparent mechanisms for emulating some of the data distribution facilities ...
Current high-performance multicore processors provide users with a non-uniform memory access model (...
We propose a lightweight process migration mechanism and an adaptive memory prefetching scheme calle...
NUMA abilities such as explicit migration of mem-ory buffers enable flexible placement of data buffe...
This paper presents user-level dynamic page migration, a runtime technique which transparently enabl...
Virtual memory offers a simple hardware abstraction to programmers freeing them from the tedious pro...
This paper presents algorithms for improving the performance of parallel programs on multiprogrammed...
International audienceExploiting the full computational power of current hierarchical multiprocessor...
Proceedings of the 4th IEEE International Symposium on Network Computing and Applications, NCA 2005,...
A common approach to improve memory access in NUMA machines exploits operating system (OS) page prot...
The performance of multiprogrammed shared-memory multiprocessors suffers often from scheduler interv...
This paper introduces two novel algorithms for thread migrations, named CIMAR (Core-aware Interchang...
International audienceDynamic task-parallel programming models are popular on shared-memory systems,...
Journal ArticleIn future multi-cores, large amounts of delay and power will be spent accessing data...
International audienceThis paper describes a new iso-address approach to the dynamic allocation of d...
This paper describes transparent mechanisms for emulating some of the data distribution facilities ...
Current high-performance multicore processors provide users with a non-uniform memory access model (...
We propose a lightweight process migration mechanism and an adaptive memory prefetching scheme calle...