International audienceThis paper presents the first experimental results of the use of our new adaptive tool for synchronization, based on ordered read-write locks, ORWL. They provide a new synchronizing method for data-oriented parallel algorithms and are particularly suited for iterative pipelined algorithms with out-of-core data. We conducted experiments with the classic benchmarking Livermore Kernel~23 algorithm to validate the theoretical model and measure the efficiency of the first available implementation of ORWL in the parXXL library. They show that this tool is able to efficiently control an IO bound application running on 64 parallel POSIX threads with tight data dependencies between them
On shared memory multiprocessors, synchronization often turns out to be a performance bottleneck and...
Multicore design is a major issue in modern computer architectures. Programmers are urged to design ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
This article is accepted for publication in the post-proceedings of the Workshop on Algorithms and P...
International audienceWe introduce the framework of ordered read-write locks, ORWL, that are charact...
International audienceWe present a source-to-source auto-generating framework that enables alarge pr...
International audienceThis paper investigate a mutual exclusion algorithm on distributed systems. We...
The advent of chip multi-processors has led to an increase in computational performance in recent ye...
In multicores, performance-critical synchronization is increasingly performed in a lock-free manner ...
To use the computational power of modern computing machines, we have to deal with concurrent program...
Journal ArticleShared memory programs guarantee the correctness of concurrent accesses to shared dat...
Writing correct synchronization is one of the main difficulties of multithreaded programming. Incorr...
Over the past decade, multicore machines have become the norm. A single machine is capable of having...
Efficient synchronization is important for achieving good performance in parallel programs, especial...
International audienceIn this paper, we put forward PaSTeL, an engine dedicated to parallel algorith...
On shared memory multiprocessors, synchronization often turns out to be a performance bottleneck and...
Multicore design is a major issue in modern computer architectures. Programmers are urged to design ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
This article is accepted for publication in the post-proceedings of the Workshop on Algorithms and P...
International audienceWe introduce the framework of ordered read-write locks, ORWL, that are charact...
International audienceWe present a source-to-source auto-generating framework that enables alarge pr...
International audienceThis paper investigate a mutual exclusion algorithm on distributed systems. We...
The advent of chip multi-processors has led to an increase in computational performance in recent ye...
In multicores, performance-critical synchronization is increasingly performed in a lock-free manner ...
To use the computational power of modern computing machines, we have to deal with concurrent program...
Journal ArticleShared memory programs guarantee the correctness of concurrent accesses to shared dat...
Writing correct synchronization is one of the main difficulties of multithreaded programming. Incorr...
Over the past decade, multicore machines have become the norm. A single machine is capable of having...
Efficient synchronization is important for achieving good performance in parallel programs, especial...
International audienceIn this paper, we put forward PaSTeL, an engine dedicated to parallel algorith...
On shared memory multiprocessors, synchronization often turns out to be a performance bottleneck and...
Multicore design is a major issue in modern computer architectures. Programmers are urged to design ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...