Deadlock free control synthesis for partially controllable marked graphs

International audienceThis paper deals with the problem of deadlock avoidance in control synthesis for a discrete event systems modeled by marked graphs. The specifications are modeled by General Mutual Exclusion Constraints. We show that, even that the system to be controlled is live, the restriction introduced by the controller may generate deadlocks. Therefore, the research work we present in this paper focuses on enhancing an existing control synthesis technique in order to provide a deadlock free maximal permissive control law