An FPGA architecture for solving the Table Maker's Dilemma

Cet article a obtenu le "best paper award" de la conférenceInternational audienceSolving the Table Maker's Dilemma, for a given function and a given target floating-point format, requires testing the value of the function, with high precision, at a very large number of consecutive values. We give an algorithm that allows for performing such computations on a very regular architecture, and present an FPGA implementation of that algorithm