Silicon-on-Insulator (SOI) MOSFETs with a single crystalline buried body contact has been uniquely fabricated using epitaxial lateral overgrowth (ELO) from selective epitaxial growth (SEG). Unlike other SOI body contacts, this technique incorporates the buried body contact during SOI active area formation using ELO. The resultant cross section is an SOI active area physically connected to a buried body using the same single crystalline silicon. The physical uniqueness of this buried body contact maintains device symmetry and allows topside body contact isolated away from the device source/drain edge. Because the body contact is buried and isolated, additional advantages are reduced contact-area penalty compared to historical SOI body contac...
In the epitaxial lateral overgrowth (ELO) technique an SOI layer is formed by overgrowing oxide with...
As the need for VLSI circuits with high speed and low power increases the necessity for technologies...
Conventional MOSFET has already passed lower than 45nm transistor fabrication. As silicon is now hit...
Silicon-on-Insulator (SOI) MOSFETs with a single crystalline buried body contact has been uniquely f...
grantor: University of TorontoLow power electronics is critical in portable applications. ...
Silicon-On-Insulator (SOI) technology, which was originally developed for military applications, is ...
Silicon-on-Insulator (SOI) MOSFETs were uniquely fabricated using the epitaxial lateral overgrowth (...
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer ...
Silicon-on-insulator (SOI) technology is an effective approach of mitigating the short channel effec...
Multiple layers of Silicon-on-Insulator (MLSOI) device islands fabrication process was developed for...
Traditional scaling methodology which utilizes channel doping, shallow junctions, etc. is no longer ...
In this paper two kinds of novel localized-SOI structure devices, named as Quasi-SOI MOSFET and sour...
In this paper two kinds of novel localized-SOI structure devices, named as Quasi-SOI MOSFET and sour...
Selective Epitaxial Growth (SEG) and Epitaxial Lateral Overgrowth (ELO) of silicon has shown great p...
In this paper, the novel Quasi-SOI CMOS architecture is fabricated based on bulk Si substrate for th...
In the epitaxial lateral overgrowth (ELO) technique an SOI layer is formed by overgrowing oxide with...
As the need for VLSI circuits with high speed and low power increases the necessity for technologies...
Conventional MOSFET has already passed lower than 45nm transistor fabrication. As silicon is now hit...
Silicon-on-Insulator (SOI) MOSFETs with a single crystalline buried body contact has been uniquely f...
grantor: University of TorontoLow power electronics is critical in portable applications. ...
Silicon-On-Insulator (SOI) technology, which was originally developed for military applications, is ...
Silicon-on-Insulator (SOI) MOSFETs were uniquely fabricated using the epitaxial lateral overgrowth (...
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer ...
Silicon-on-insulator (SOI) technology is an effective approach of mitigating the short channel effec...
Multiple layers of Silicon-on-Insulator (MLSOI) device islands fabrication process was developed for...
Traditional scaling methodology which utilizes channel doping, shallow junctions, etc. is no longer ...
In this paper two kinds of novel localized-SOI structure devices, named as Quasi-SOI MOSFET and sour...
In this paper two kinds of novel localized-SOI structure devices, named as Quasi-SOI MOSFET and sour...
Selective Epitaxial Growth (SEG) and Epitaxial Lateral Overgrowth (ELO) of silicon has shown great p...
In this paper, the novel Quasi-SOI CMOS architecture is fabricated based on bulk Si substrate for th...
In the epitaxial lateral overgrowth (ELO) technique an SOI layer is formed by overgrowing oxide with...
As the need for VLSI circuits with high speed and low power increases the necessity for technologies...
Conventional MOSFET has already passed lower than 45nm transistor fabrication. As silicon is now hit...