International audienceWe present a class of relaxed memory models, defined in Coq, parame-terised by the chosen permitted local reorderings of reads and writes, and by the visibility of inter-and intra-processor communications through memory (e.g. store atomicity relaxation). We prove results on the required behaviour and placement of memory fences to restore a given model (such as Sequential Consistency) from a weaker one. Based on this class of models we develop a tool, diy, that system-atically and automatically generates and runs litmus tests. These tests can be used to explore the behaviour of processor implementations and the behaviour of models, and hence to compare the two against each other. We detail the results of experiments on ...
International audienceWe present Cubicle-W, a new version of the Cubicle model checker to verify par...
Weak memory models are used to increase the performance of concurrent programs by allowing program i...
International audienceModern multicore processor architectures and compilers of shared-memory concur...
International audienceWe present a class of relaxed memory models, defined in Coq, parameterised by ...
This paper describes Coq libraries devoted to the semantic of relaxed memory models. These libraries...
International audienceThere is a joke where a physicist and a mathematician are asked to herd cats. ...
We present an axiomatic framework, implemented in the Coq proof assistant, to define weak memory mod...
International audienceConcurrent programs running on weak memory models exhibit re-laxed behaviours,...
Weak-memory models are standard formal specifications of concurrency across hardware, programming la...
Well-defined memory consistency models are necessary for writing correct parallel software. Developi...
Memory consistency models (MCMs) are at the heart of concurrent programming. They represent the beha...
International audienceMemory models define an interface between programs written in some language an...
We address the verification problem of finite-state concurrent pro-grams running under weak memory m...
We describe a program logic for weak memory (also known as relaxed memory). The logic is based on Ho...
Weak memory models formalize the inconsistent behaviors that one can expect to observe in multithrea...
International audienceWe present Cubicle-W, a new version of the Cubicle model checker to verify par...
Weak memory models are used to increase the performance of concurrent programs by allowing program i...
International audienceModern multicore processor architectures and compilers of shared-memory concur...
International audienceWe present a class of relaxed memory models, defined in Coq, parameterised by ...
This paper describes Coq libraries devoted to the semantic of relaxed memory models. These libraries...
International audienceThere is a joke where a physicist and a mathematician are asked to herd cats. ...
We present an axiomatic framework, implemented in the Coq proof assistant, to define weak memory mod...
International audienceConcurrent programs running on weak memory models exhibit re-laxed behaviours,...
Weak-memory models are standard formal specifications of concurrency across hardware, programming la...
Well-defined memory consistency models are necessary for writing correct parallel software. Developi...
Memory consistency models (MCMs) are at the heart of concurrent programming. They represent the beha...
International audienceMemory models define an interface between programs written in some language an...
We address the verification problem of finite-state concurrent pro-grams running under weak memory m...
We describe a program logic for weak memory (also known as relaxed memory). The logic is based on Ho...
Weak memory models formalize the inconsistent behaviors that one can expect to observe in multithrea...
International audienceWe present Cubicle-W, a new version of the Cubicle model checker to verify par...
Weak memory models are used to increase the performance of concurrent programs by allowing program i...
International audienceModern multicore processor architectures and compilers of shared-memory concur...