Dynamic reconfiguration and low power design : towards self-adaptive massively parallel embedded systems

Sophisticated embedded systems are becoming wide spread today in aerospace, automotive, avionic, and defence industries. They are responsible for control, collision avoidance, driver assistance, target tracking, navigation and communications, amongst other functions. According to the characteristics of these functionalities, high computation rates should be well-delivered while carrying-out intensive signal processing. Furthermore, these embedded systems often operate in uncertain environments. So, they should adapt their functioning mode according to the environmental conditions to provide reliability, fault tolerance, deterministic timing guarantees, and energy efficiency. Undoubtedly, the essential feature of systems to reconfigure themselves (at the hardware or the software level) at run-time comes with additional complexity in the different design flow steps.The design of these sophisticated embedded systems calls for several teams with different domain experts covering electronics, architecture, software engineering, etc. We are in a new era promoting for the dynamicity of heterogeneous and parallel processing. Academic and industrial researchers must address the challenges inherent from this new trend at all the design steps. The scope of my research topics covers mainly low-power design methodology, dynamic execution models for heterogeneous and massively parallel architectures, and reconfiguration model for next generation 3D-FPGAs. My research promotes the convergence towards self-adaptive massively parallel embedded systems