International audienceIn contrast to analog models, binary circuit models are high-level abstractions that play an important role in assess-ing the correctness and performance characteristics of digital circuit designs: (i) modern circuit design relies on fast digital timing simulation tools and, hence, on binary-valued circuit models that faithfully model signal propagation, even throughout a complex design, and (ii) binary circuit models provide a level of abstraction that is amenable to formal correctness proofs. A mandatory feature of any such model is the ability to trace glitches and other short pulses precisely as they occur in physical circuits, as their presence may affect a circuit's correctness and its performance characteristics...
International audienceDelay estimation is a crucial task in digital circuit design as it provides th...
Analog/Mixed-signal (AMS) systems (e.g., ADCs and DACs, charge pumps, comparators, SERDES...
AbstractThis article exhibits a particular encoding of logic circuits into a sheaf formalism. The ce...
Modern digital circuit design relies on fast digital timing simulation tools and, hence, on accurate...
International audience[Függer et al., IEEE TC 2016] proved that no existing digital circuit model, i...
International audienceWe show that no existing continuous-time, binary value-domain model for digita...
International audienceFast digital timing simulations based on continuous-time, digital-value circui...
International audienceAccurate delay models are important for static and dynamic timing analysis of ...
The authors present the Inertial and Degradation Delay Model (IDDM) for CMOS digital simulation. Th...
Timing verification of digital CMOS circuits is a key point in the design process. In this contribu...
This thesis shows that rigorous verification of some analog implementation of any Quasi-Delay-Insens...
We introduce the Composable Involution Delay Model (CIDM) for fast and accurate digital simulation. ...
A novel path delay fault simulator for combinational logic circuits which is capable of detecting bo...
Arbeit an der Bibliothek noch nicht eingelangt - Daten nicht geprüftAbweichender Titel nach Übersetz...
This paper proposes a black-box behavioral modeling framework for analog circuit blocks operating un...
International audienceDelay estimation is a crucial task in digital circuit design as it provides th...
Analog/Mixed-signal (AMS) systems (e.g., ADCs and DACs, charge pumps, comparators, SERDES...
AbstractThis article exhibits a particular encoding of logic circuits into a sheaf formalism. The ce...
Modern digital circuit design relies on fast digital timing simulation tools and, hence, on accurate...
International audience[Függer et al., IEEE TC 2016] proved that no existing digital circuit model, i...
International audienceWe show that no existing continuous-time, binary value-domain model for digita...
International audienceFast digital timing simulations based on continuous-time, digital-value circui...
International audienceAccurate delay models are important for static and dynamic timing analysis of ...
The authors present the Inertial and Degradation Delay Model (IDDM) for CMOS digital simulation. Th...
Timing verification of digital CMOS circuits is a key point in the design process. In this contribu...
This thesis shows that rigorous verification of some analog implementation of any Quasi-Delay-Insens...
We introduce the Composable Involution Delay Model (CIDM) for fast and accurate digital simulation. ...
A novel path delay fault simulator for combinational logic circuits which is capable of detecting bo...
Arbeit an der Bibliothek noch nicht eingelangt - Daten nicht geprüftAbweichender Titel nach Übersetz...
This paper proposes a black-box behavioral modeling framework for analog circuit blocks operating un...
International audienceDelay estimation is a crucial task in digital circuit design as it provides th...
Analog/Mixed-signal (AMS) systems (e.g., ADCs and DACs, charge pumps, comparators, SERDES...
AbstractThis article exhibits a particular encoding of logic circuits into a sheaf formalism. The ce...