In this paper, we present accurate estimation of signal activity at the internal nodes of sequential logic circuits. The methodology is based on stochastic model of logic signals and takes spatial and temporal correlations of logic signals into con~iderai~ionG. iven the State Tranzjition Graph (STG) of a Finite State Machine (FSM), we create an Extended State Transition Graph (ESTG), where the temporal correlations of the input signals are explicitly represented. From the graph we derive the equations to calculiste exact signal probabilities and activities. However, for large circuits the method can be computationally expensive. Therefore, we propose an approximate solution method and a Monte Carlo based approach. The approximate method unr...
We introduce combinational stochastic logic, an abstraction that generalizes deterministic digital c...
We describe a model of Field Programmable Gate Array based systems realised with the Stochastic Acti...
We present a new method of gate-level power estimation that combines the advantages of simulation-ba...
In this paper, we present accurate estimation of signal activity at the internal nodes of sequential...
This paper presents accurate estimation of signal activity at the internal nodes of combinational lo...
While estimating glitches or spurious transitions is challenge due to signal correlations, the rando...
This thesis presents a novel, non-simulative, probabilistic model for switching activity in sequenti...
Recently developed methods for power estimation have primarily focused on combinational logic, We pr...
While estimating glitches or spurious transitions is challenge due to signal correlations, the rando...
This work presents techniques for computing the switching activities of all circuit nodes under pseu...
In this paper we present a Monte-Carlo based statistical techniques for estimating power in sequenti...
Reliability assessment is an important part of the design process of digital integrated circuits. We...
Our aim is the development of a novel probabilistic method to estimate the power consumption of a co...
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuit...
In high-speed data networks, the bit-error-rate specification on the sys-tem can be very stringent, ...
We introduce combinational stochastic logic, an abstraction that generalizes deterministic digital c...
We describe a model of Field Programmable Gate Array based systems realised with the Stochastic Acti...
We present a new method of gate-level power estimation that combines the advantages of simulation-ba...
In this paper, we present accurate estimation of signal activity at the internal nodes of sequential...
This paper presents accurate estimation of signal activity at the internal nodes of combinational lo...
While estimating glitches or spurious transitions is challenge due to signal correlations, the rando...
This thesis presents a novel, non-simulative, probabilistic model for switching activity in sequenti...
Recently developed methods for power estimation have primarily focused on combinational logic, We pr...
While estimating glitches or spurious transitions is challenge due to signal correlations, the rando...
This work presents techniques for computing the switching activities of all circuit nodes under pseu...
In this paper we present a Monte-Carlo based statistical techniques for estimating power in sequenti...
Reliability assessment is an important part of the design process of digital integrated circuits. We...
Our aim is the development of a novel probabilistic method to estimate the power consumption of a co...
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuit...
In high-speed data networks, the bit-error-rate specification on the sys-tem can be very stringent, ...
We introduce combinational stochastic logic, an abstraction that generalizes deterministic digital c...
We describe a model of Field Programmable Gate Array based systems realised with the Stochastic Acti...
We present a new method of gate-level power estimation that combines the advantages of simulation-ba...