Technological limitations faced by the semi-conductor manufacturers in the early 2000's restricted the increase in performance of the sequential computation units. Nowadays, the trend is to increase the number of processor cores per socket and to progressively use the GPU cards for highly parallel computations. Complexity of the recent architectures makes it difficult to statically predict the performance of a program. We describe a reliable and accurate parallel loop nests execution time prediction method on GPUs based on three stages: static code generation, offline profiling, and online prediction. In addition, we present two techniques to fully exploit the computing resources at disposal on a system. The first technique consists in join...
Safety-critical systems - such as electronic flight control systems and nuclear reactor controls - m...
Many tools exist to solve constrained path-planning problems. They can be classified as follows. In ...
L'objectif de la thèse est la réalisation d'un simulateur de circuits électrotechniques et réseaux é...
The sequence comparison process is one of the main bioinformatics task. The new sequencing technolog...
Parallel programs need to manage the trade-off between the time spent in synchronisation and computa...
Iterative processing is widely adopted nowadays in modern wireless receivers for the decoding of adv...
Hardware compression techniques are typically simplifications of software compression methods. They ...
In recent years, the research focus has moved from core microarchitecture to uncore microarchitectur...
Multiprocessor system on chip (MPSoC) such as the CELL processor or the more recent Platform2012 are...
Solving large sparse linear system is an essential part of numerical simulations. These resolve can ...
Complex networked applications are assembled by connecting software componentsdistributed across mul...
Systems-on-chips in the field of digital communications are becoming extremely diversified and compl...
Virtual worlds attract millions of users and these popular applications --supported by gigantic data...
Historically, malware (MW) analysis has heavily resorted to human savvy for manual signature creatio...
The research interests presented in this "Habilitation" revolve around application specific hardware...
Safety-critical systems - such as electronic flight control systems and nuclear reactor controls - m...
Many tools exist to solve constrained path-planning problems. They can be classified as follows. In ...
L'objectif de la thèse est la réalisation d'un simulateur de circuits électrotechniques et réseaux é...
The sequence comparison process is one of the main bioinformatics task. The new sequencing technolog...
Parallel programs need to manage the trade-off between the time spent in synchronisation and computa...
Iterative processing is widely adopted nowadays in modern wireless receivers for the decoding of adv...
Hardware compression techniques are typically simplifications of software compression methods. They ...
In recent years, the research focus has moved from core microarchitecture to uncore microarchitectur...
Multiprocessor system on chip (MPSoC) such as the CELL processor or the more recent Platform2012 are...
Solving large sparse linear system is an essential part of numerical simulations. These resolve can ...
Complex networked applications are assembled by connecting software componentsdistributed across mul...
Systems-on-chips in the field of digital communications are becoming extremely diversified and compl...
Virtual worlds attract millions of users and these popular applications --supported by gigantic data...
Historically, malware (MW) analysis has heavily resorted to human savvy for manual signature creatio...
The research interests presented in this "Habilitation" revolve around application specific hardware...
Safety-critical systems - such as electronic flight control systems and nuclear reactor controls - m...
Many tools exist to solve constrained path-planning problems. They can be classified as follows. In ...
L'objectif de la thèse est la réalisation d'un simulateur de circuits électrotechniques et réseaux é...