International audienceThe Scotch software computes process-processor mappings by assigning recursively parts of the process graphs to parts of the target graphs. To date, while regular target architectures can be described using pre-coded routines, irregular architectures or parts of regular ones require O(P^2) data structures, which makes them unpractical for very big machines. We will present a new, multilevel description of target architectures that alleviates this problem, trading-off memory for run time
International audienceDirected acyclic graphs are commonly used to model scientific workflows, by ex...
International audienceApplications’ performance is influenced by the mapping of processes to computi...
International audienceThis paper presents a process calculus framework for modeling ubiquitous compu...
Data locality is a critical issue in order to achieve performance on today's high-end parallel machi...
International audienceDue to the advent of modern hardware architectures of high-performance comput-...
Ce travail de thèse de doctorat est dédié à l'étude d'un problème de placement de tâches dans le dom...
Directed acyclic graphs are commonly used to model scientific workflows, by expressing dependencies ...
Partitioning graphs into blocks of roughly equal size such that few edges run between blocks is a fr...
International audienceMATCHING COMMUNICATION PATTERN WITH UNDERLYING HARDWARE ARCHITECTUR
Abstract. Static mapping is the assignment of parallel processes to the processing elements (PEs) of...
GDR-GPLWith the slowdown of Moore's law and the end of the frequency race, the performance comes fro...
International audienceInterconnection networks in parallel platforms can be made of thousands of nod...
International audienceProcess mapping (or process placement) is a useful algorithmic technique to op...
This paper discusses automatic mapping methods for concurrent tasks to processors applying graph ana...
Directed acyclic graphs are commonly used to model scientific workflows, by expressing dependencies ...
International audienceDirected acyclic graphs are commonly used to model scientific workflows, by ex...
International audienceApplications’ performance is influenced by the mapping of processes to computi...
International audienceThis paper presents a process calculus framework for modeling ubiquitous compu...
Data locality is a critical issue in order to achieve performance on today's high-end parallel machi...
International audienceDue to the advent of modern hardware architectures of high-performance comput-...
Ce travail de thèse de doctorat est dédié à l'étude d'un problème de placement de tâches dans le dom...
Directed acyclic graphs are commonly used to model scientific workflows, by expressing dependencies ...
Partitioning graphs into blocks of roughly equal size such that few edges run between blocks is a fr...
International audienceMATCHING COMMUNICATION PATTERN WITH UNDERLYING HARDWARE ARCHITECTUR
Abstract. Static mapping is the assignment of parallel processes to the processing elements (PEs) of...
GDR-GPLWith the slowdown of Moore's law and the end of the frequency race, the performance comes fro...
International audienceInterconnection networks in parallel platforms can be made of thousands of nod...
International audienceProcess mapping (or process placement) is a useful algorithmic technique to op...
This paper discusses automatic mapping methods for concurrent tasks to processors applying graph ana...
Directed acyclic graphs are commonly used to model scientific workflows, by expressing dependencies ...
International audienceDirected acyclic graphs are commonly used to model scientific workflows, by ex...
International audienceApplications’ performance is influenced by the mapping of processes to computi...
International audienceThis paper presents a process calculus framework for modeling ubiquitous compu...