Towards Modeling and Simulation of Exascale Computing Platforms

National audienceFuture super-computer platforms will be facing big challenges due tothe enormous power consumption. One possible solution to this problemwould be to develop HPC systems from today’s energy-efficient hardwaresolutions used in embedded and mobile devices like ARM. However, ARMchips have never been used in HPC programing before, leading to a numberof significant challenges. Therefore, we experimented with ARM processors and compared their performance with the architectures that are knownbetter, in this case last generations of Intel processors. Due to the memorybottleneck of most scientific applications, understanding the performanceof CPU caches in this context is crucial, thus this research was investigat-ing the processor performance depending on memory hierarchy. We presentnot only differences and complexity of these two architectures, but also howchanging seemingly innocuous aspects of an experimental setup can causecompletely distinctive behavior. Additionally, we demonstrate very cleanand systematic methodology, which aid us in achieving good performanceestimations