Gate spacers etching of Si$_3$N$_4$ using cyclic approach for 3D CMOS devices

International audienceIn this work, we optimize a CH$_3$F/O$_2$/He/SiCl$_4$ chemistry to etch silicon nitride gate spacers for 3D CMOS devices in a 300mm inductivelycoupled plasma reactor. The chemistry has high directivity and high selectivity to Si and SiO$_2$. A cyclic approach, which alternates thischemistry with a CH$_2$F$_2$/O$_2$/CH$_4$/He plasma, is investigated. Using $quasi\ in\ situ$ x-ray photoelectron spectroscopy and ellipsometry measurements,etching mechanisms are proposed to explain the results obtained. As a result of process optimization, silicon nitride spacers with verticalprofile and a small critical dimension loss of 3 nm as well as complete spacers removal on sidewalls of the active area are obtained on3D patterns, confirming the advantages of this approach