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Optimization of flip chip interconnect reliability using a variable compliance interconnect design

Tay, A.A.O.
Sun, W.

Publication date

January 2006

DOI

10.1109/EPTC.2006.342704

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Abstract

10.1109/EPTC.2006.342704Proceedings of the Electronic Packaging Technology Conference, EPTC133-13

Extracted data

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Döring, R.
Michel, B.

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