Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC2948-95
9 pagesA new approach to characterize the power dissipation on complex digital signal processors (DS...
Current day research in microprocessor architecture targeted for high throughput and performance can...
Chip multiprocessors (CMPs) aim to develop both instruction-level and thread-level parallelisms to b...
On current superscalar processors, performance and power issues cannot be decoupled for designers. E...
Abstract. As process technology scales down, power wall starts to hinder improvements in processor p...
10.1109/CIT.2005.34Proceedings - Fifth International Conference on Computer and Information Technolo...
A proposed performance model for superscalar processors consists of 1) a component that models the r...
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and ...
High-level decisions in high-performance processors are often decoupled from their ultimate impact o...
10.1109/CASES.2013.66625192013 International Conference on Compilers, Architecture and Synthesis for...
Optimizing processors for (a) specific application(s) can substantially improve energy-efficiency. W...
Superscalar in-order processors form an interesting alternative to out-of-order processors because o...
This report documents the program and the outcomes of Dagstuhl Perspectives Workshop 15342 "Power-Bo...
High performance, low power and low cost will continue to be driving factors for digital signal proc...
This architecture generally relates to the microarchitecture and organization of microprocessors des...
9 pagesA new approach to characterize the power dissipation on complex digital signal processors (DS...
Current day research in microprocessor architecture targeted for high throughput and performance can...
Chip multiprocessors (CMPs) aim to develop both instruction-level and thread-level parallelisms to b...
On current superscalar processors, performance and power issues cannot be decoupled for designers. E...
Abstract. As process technology scales down, power wall starts to hinder improvements in processor p...
10.1109/CIT.2005.34Proceedings - Fifth International Conference on Computer and Information Technolo...
A proposed performance model for superscalar processors consists of 1) a component that models the r...
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and ...
High-level decisions in high-performance processors are often decoupled from their ultimate impact o...
10.1109/CASES.2013.66625192013 International Conference on Compilers, Architecture and Synthesis for...
Optimizing processors for (a) specific application(s) can substantially improve energy-efficiency. W...
Superscalar in-order processors form an interesting alternative to out-of-order processors because o...
This report documents the program and the outcomes of Dagstuhl Perspectives Workshop 15342 "Power-Bo...
High performance, low power and low cost will continue to be driving factors for digital signal proc...
This architecture generally relates to the microarchitecture and organization of microprocessors des...
9 pagesA new approach to characterize the power dissipation on complex digital signal processors (DS...
Current day research in microprocessor architecture targeted for high throughput and performance can...
Chip multiprocessors (CMPs) aim to develop both instruction-level and thread-level parallelisms to b...