Synthesis of digital circuits with ability to generalize

A method for synthesis of digital hardware classification circuits is presented in this paper. The method works by first selecting data from the truth table that are important for generalization of the circuit. The selected subset is provided to a Boolean minimization algorithm (Espresso) that, by hypercube expansion, generates a classifier with a smoother separation surface between classes. The results show that obtained circuits have a generalization performance comparable to Support Vector Machines and Multilayer Perceptron