Hardware design of scalable and unified modular division and Montgomery multiplication

Graduation date: 2006Modular arithmetic is a basic operation for many cryptography applications\ud such as public key cryptography, key exchange algorithms, digital signatures,\ud and elliptic curve cryptography. Therefore, fast and efficient hardware design of\ud modular division and multiplication is proposed for implementation of cryptography\ud system with intent to achieve information security. The hardware unit is\ud capable of computing modular division and Montgomery multiplication in both\ud prime GF(p) and binary extension GF(2n) fields. Carry-save representation is\ud adopted to create a precision independent hardware and to reduce critical path\ud delay. However, carry-save vectors introduce issues of unsafe arithmetic right\ud shift and ambiguous zero detection, which are investigated and resolved. Additionally,\ud in order to alleviate the increase in area resulting from using carry-save\ud representation, a scalable architecture is developed for the hardware design