Highly Scaled High Dielectric Constant Oxides on III-V CMOS with Low Interface Trap and Low Leakage Densities

Complementary metal-oxide-semiconductor (CMOS) transistors are being aggressively scaled, reaching the fundamental limits of silicon. Due to their much higher electron mobilities, III-V semiconductors are being considered as alternative channel materials to potentially replace Si. This requires the integration of high dielectric constant (high-k) oxides with III-V semiconductor layers, which is the most significant challenge to achieve high performance of III-V metal-oxide-semiconductor field-effect transistors (MOSFETs). Large interface trap densities, inherent to these interfaces, degrade the transistor performance.In this dissertation, we utilize in-situ atomic layer deposition (ALD) combined with surface passivation techniques to reduce the interface traps densities between high-k oxides and III-V semiconductors to obtain highly scaled, low defect density interfaces. Cycles of hydrogen and/or nitrogen plasmas and metal-organic precursors were applied directly onto n- and p type In0.53Ga0.47As surfaces before high-k oxide ALD. The high-k oxides investigated include Al2O3, HfO2, ZrO2, and TiO2. We examined the electrical characteristics of MOS capacitors (MOSCAPs), surface morphology of the surface, and chemical components of the interface. High quality interfaces of high-k oxide and n-type In0.53Ga0.47As with low interface trap densities (Dit) of 1012 eV-1 cm-2, low leakage current density, and high capacitance densities gate stacks (>5 uF/cm2) were achieved by the optimized cycles of nitrogen plasma+tetrakis(dimethylamido)titanium (TDMAT) ALD surface cleaning. Using x-ray photoelectron spectroscopy, the interface region indicates that the removing As-oxides, sub-oxides, and As-As bonding are responsible for decreasing frequency dispersion in the midgap region of the n-type In0:53Ga0:47As, reducing midgap Dit, and unpinning Fermi level. The modied interface chemistry from Al2O3 to TiO2 leads to lower frequency dispersion in accumulation. The highly polarized TiO2 layer produces dipole, which serves to increase barrier height between oxide and semiconductor, controlling leakage current issue. Optimized plasma condition to the specific III-V surface creates rapid and complete coverage interface layer on the III-V surface and increases nucleation density for the high quality surface, which allows for the growth of extremely scaled high-k oxide directly on III-V channels. High quality interface also prevents subcutaneous oxidation. Different conditions of p-type In0.53Ga0.47As surface passivation were investigated. Unpinned Fermi level on p type In0.53Ga0.47As surface was achieved. Comparison of electrical characteristics between n- and p-type In0.53Ga0.47As MOSCAPs are presented. Different surface plasma treatment is needed for p-type In0.53Ga0.47As for achieving high quality interface