In this report we discuss strengths and weaknesses of logic synthesis systems and describe a system for microarchitectural and logic optimization. Our system uses a set of algorithms for synthesizing SSI/MSI macros from parameterized microarchitecture components. In addition, it uses rules for optimizing both at the microarchitecture and logic level. The system increases designer productivity and requires less design knowledge and experience from circuit engineers
Logic circuits are at the core of modern computing. The process of designing circuits which are effi...
This paper presents SOCRATES, a system of programs which Synthesize and optimize combinational logic...
Twenty to fifty percent of the active area of most semicustom integrated circuits is devoted to comb...
This report describes different strategies for area, power, and time optimization for designs on mic...
This thesis spans two levels of the design process by examining optimization at both the register-tr...
In recent years the drive to produce more complex integrated circuits while spending less design tim...
As VLSI integration size and chip complexity keep increasing, logic design is becoming more complex ...
We show how an extended Prolog can be exploited to implement different electronic CAD tools. Startin...
The Programmable Logic Array (PLA) macro is a physical structure which simpl8es LSZ chip design whil...
The logic networks that can be put on a single chip continues to grow in size and complexity. There ...
In this paper, we revisit Boole's expansion theorem to propose a new synthesis method for implicatio...
AbstractWe show how an extended Prolog can be exploited to implement different electronic CAD tools....
Progress in digital technology has yielded continuing growth in the complexity of circuits that can ...
ADAS is an Application-driven Design Automation System for microprocessor design. The goal of ADAS i...
In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto...
Logic circuits are at the core of modern computing. The process of designing circuits which are effi...
This paper presents SOCRATES, a system of programs which Synthesize and optimize combinational logic...
Twenty to fifty percent of the active area of most semicustom integrated circuits is devoted to comb...
This report describes different strategies for area, power, and time optimization for designs on mic...
This thesis spans two levels of the design process by examining optimization at both the register-tr...
In recent years the drive to produce more complex integrated circuits while spending less design tim...
As VLSI integration size and chip complexity keep increasing, logic design is becoming more complex ...
We show how an extended Prolog can be exploited to implement different electronic CAD tools. Startin...
The Programmable Logic Array (PLA) macro is a physical structure which simpl8es LSZ chip design whil...
The logic networks that can be put on a single chip continues to grow in size and complexity. There ...
In this paper, we revisit Boole's expansion theorem to propose a new synthesis method for implicatio...
AbstractWe show how an extended Prolog can be exploited to implement different electronic CAD tools....
Progress in digital technology has yielded continuing growth in the complexity of circuits that can ...
ADAS is an Application-driven Design Automation System for microprocessor design. The goal of ADAS i...
In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto...
Logic circuits are at the core of modern computing. The process of designing circuits which are effi...
This paper presents SOCRATES, a system of programs which Synthesize and optimize combinational logic...
Twenty to fifty percent of the active area of most semicustom integrated circuits is devoted to comb...