An image rejection circuit with sign detection only

In direct-conversion receivers, radio frequency (RF) signals are down-converted to zero or low intermediate frequency (IF) using complex in-phase and quadrature (I/Q) mixers with no prior image filtering. Due to I/Q path gain and phase errors, image leaks into the signal band during the down-conversion process. A generic image rejection algorithm is proposed to reject image in the baseband using a zero-forcing sign-sign adaptive feedback concept. The orthonormal property of complex I/Q channels is exploited to update their gain and phase errors by detecting only four signs, and image is corrected with four multiplications and two additions. The correction and detection algorithms can be implemented in a digital or analog form. The analog correction circuit consists of a complex baseband sample and hold (S/H) with trim capacitors. At 40 MS/s sampling rate, the analog, 12-b digital, and hybrid (analog correction and digital detection) image rejection circuits achieve an image rejection of 62, 65, and 65 dB, respectively. The prototype chip fabricated in 0.18-um CMOS occupies 800 x 450 um2, and consumes 23 mW at 1.8