The degradation predicted by classical DC reliability methods, such as bias temperature instability (BTI) and hot carrier injection (HCI), might not translate sufficiently to the AC conditions, which are relevant on the circuit level. The direct analysis of circuit level reliability is therefore an essential task for hardware qualification in the near future. Ring oscillators (RO) offer a good model system, where both BTI and HCI contribute to the degradation. In this work, it is qualitatively shown that the additional off-state stress plays a crucial role at very high stress voltages, beyond upper usage boundaries. To yield an accurate RO lifetime prediction a frequency measurement setup with high resolution is used, which can resolve smal...
This paper systematically investigates the hot carrier (HC) and soft-breakdown (SBD) induced perform...
Precise measurement of digital circuit degradation is a key aspect of aging tolerant digital circuit...
As we enter into sub-nanometer technologies in order to increase performance of CMOS devices, reliab...
The degradation predicted by classical DC reliability methods, such as bias temperature instability ...
The frequency shift of ring oscillators operated at high power supply voltages exhibits hot-carrier ...
International audienceThe study of parameter drift due to interface defect generation in “Off” mode ...
International audienceImproving device aging models requires to consider hot-carrier degradation (HC...
International audienceThis work proposes a new bottom-up approach for on-line estimation of circuit ...
International audienceReliability simulation is an area of increasing interest as it allows the desi...
The work of this thesis focuses on the simulation of the electrical parameters degradation of MOS an...
To study the gate oxide degradation under stress conditions closer to the actual operation of device...
The static BTI stress (DC stress) have a significant influence on duty cycle of Ring Oscillators, lo...
Circuit reliability issues have great attention to the researchers, especially bias temperature inst...
We propose a circuit-level modeling approach for the threshold voltage shift in PMOS devices due to ...
Circuit-level oxide degradation effects on inverter circuit operation and individual MOSFET behavior...
This paper systematically investigates the hot carrier (HC) and soft-breakdown (SBD) induced perform...
Precise measurement of digital circuit degradation is a key aspect of aging tolerant digital circuit...
As we enter into sub-nanometer technologies in order to increase performance of CMOS devices, reliab...
The degradation predicted by classical DC reliability methods, such as bias temperature instability ...
The frequency shift of ring oscillators operated at high power supply voltages exhibits hot-carrier ...
International audienceThe study of parameter drift due to interface defect generation in “Off” mode ...
International audienceImproving device aging models requires to consider hot-carrier degradation (HC...
International audienceThis work proposes a new bottom-up approach for on-line estimation of circuit ...
International audienceReliability simulation is an area of increasing interest as it allows the desi...
The work of this thesis focuses on the simulation of the electrical parameters degradation of MOS an...
To study the gate oxide degradation under stress conditions closer to the actual operation of device...
The static BTI stress (DC stress) have a significant influence on duty cycle of Ring Oscillators, lo...
Circuit reliability issues have great attention to the researchers, especially bias temperature inst...
We propose a circuit-level modeling approach for the threshold voltage shift in PMOS devices due to ...
Circuit-level oxide degradation effects on inverter circuit operation and individual MOSFET behavior...
This paper systematically investigates the hot carrier (HC) and soft-breakdown (SBD) induced perform...
Precise measurement of digital circuit degradation is a key aspect of aging tolerant digital circuit...
As we enter into sub-nanometer technologies in order to increase performance of CMOS devices, reliab...