We introduce the new optimization method of Simulated Evolution (SE), which is designed to find near optimal solutions to problems which are hard to solve by standard methods. The new algorithm is discussed in detail and a variety of measurements are taken to evaluate its performance under various conditions. In addition, a theoretical framework is introduced to formally describe the algorithm. A Markov analysis is performed using this mathematical model to analyze convergence properties.The Standard Cell placement problem in the VLSI design area was chosen as a representative problem for applying SE techniques. A new hierarchical placement technique using windowing methods is introduced. A complete placement program has been developed and ...
VLSI Standard Cell Placement is a hard optimization prob-lem, which is further complicated with new ...
Abstract-Parallel algorithms with quality equivalent to the simu-lated annealing placement algorithm...
VLSI standard cell placement is a hard optimization problem, which is further complicated with new i...
We introduce the new optimization method of Simulated Evolution (SE), which is designed to find near...
Abstract Simulated Evolution (SimE) is an evolutionary metaheuristic that has pro-duced results comp...
Simulated evolution (SimE) is an evolutionary metaheuristic that has produced results comparable to ...
As modern VLSI designs have become larger and more complicated, the computational requirements for d...
Abstract Simulated Evolution (SimE) is an evolutionary metaheuristic that has pro-duced results comp...
Abstract This paper presents a Fuzzy Simulated Evolution algorithm for VLSI standard cell placement ...
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a c...
Simulated annealing is a general purpose Monte Carlo optimization technique that was applied to the ...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
VLSI Standard Cell Placement is a hard optimization prob-lem, which is further complicated with new ...
Abstract-Parallel algorithms with quality equivalent to the simu-lated annealing placement algorithm...
VLSI standard cell placement is a hard optimization problem, which is further complicated with new i...
We introduce the new optimization method of Simulated Evolution (SE), which is designed to find near...
Abstract Simulated Evolution (SimE) is an evolutionary metaheuristic that has pro-duced results comp...
Simulated evolution (SimE) is an evolutionary metaheuristic that has produced results comparable to ...
As modern VLSI designs have become larger and more complicated, the computational requirements for d...
Abstract Simulated Evolution (SimE) is an evolutionary metaheuristic that has pro-duced results comp...
Abstract This paper presents a Fuzzy Simulated Evolution algorithm for VLSI standard cell placement ...
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a c...
Simulated annealing is a general purpose Monte Carlo optimization technique that was applied to the ...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
In this paper, an algorithm for VLSI standard cell placement for low power and high performance desi...
VLSI Standard Cell Placement is a hard optimization prob-lem, which is further complicated with new ...
Abstract-Parallel algorithms with quality equivalent to the simu-lated annealing placement algorithm...
VLSI standard cell placement is a hard optimization problem, which is further complicated with new i...