This thesis presents the development and use of a performance analysis methodology suitable for use in the evaluation of multiprocessor interconnection networks. The study is grounded in a detailed evaluation of the Cedar multiprocessor. Using characteristics of the behavior exhibited by the benchmarks studied on that system, a burst-traffic model is developed. The performance predictions of the model for adaptive and oblivious virtual-channel routers used in a 2D torus are compared to those of an open-loop random-traffic model, and significant differences are shown to exist.The design of a novel adaptive router, the Shunt router, is proposed. Proofs of its freedom from deadlock and livelock are provided, showing its suitability for use in ...
With the current popularity of cluster computing systems, it is increasingly important to understand...
In this paper, performance of multistage interconnection network with wormhole routing and packet sw...
The networks employed in multicomputer architectures share many characteristics with those encounter...
This thesis presents the development and use of a performance analysis methodology suitable for use ...
An efficient interconnection network that provides high bandwidth and low latency interprocessor com...
The performance evaluation of multiprocessor interconnects cannot be divorced from issues of traffic...
The interconnection network is the single most important element of a multiprocessor. Choosing the b...
This paper compares three link conflict resolution strategies applied to multicomputers with symmetr...
A Multiprocessor System (MTS) is a single computer incorporating a number of independent processors ...
Multistage interconnection networks (MIN) are used to connect processors to memories in shared memor...
[[abstract]]The authors study the performance of multiprocessor systems employing multiple buses as ...
This thesis explores issues related to the routing of messages in a k - aryn - cube multiprocessor i...
In this paper a novel architecture of dual priority single-buffered blocking Multistage Interconnect...
[[abstract]]The authors study the performance of multiprocessor systems employing multiple buses as ...
Perhaps the most critical component in determining the ultimate performance potential of a multicomp...
With the current popularity of cluster computing systems, it is increasingly important to understand...
In this paper, performance of multistage interconnection network with wormhole routing and packet sw...
The networks employed in multicomputer architectures share many characteristics with those encounter...
This thesis presents the development and use of a performance analysis methodology suitable for use ...
An efficient interconnection network that provides high bandwidth and low latency interprocessor com...
The performance evaluation of multiprocessor interconnects cannot be divorced from issues of traffic...
The interconnection network is the single most important element of a multiprocessor. Choosing the b...
This paper compares three link conflict resolution strategies applied to multicomputers with symmetr...
A Multiprocessor System (MTS) is a single computer incorporating a number of independent processors ...
Multistage interconnection networks (MIN) are used to connect processors to memories in shared memor...
[[abstract]]The authors study the performance of multiprocessor systems employing multiple buses as ...
This thesis explores issues related to the routing of messages in a k - aryn - cube multiprocessor i...
In this paper a novel architecture of dual priority single-buffered blocking Multistage Interconnect...
[[abstract]]The authors study the performance of multiprocessor systems employing multiple buses as ...
Perhaps the most critical component in determining the ultimate performance potential of a multicomp...
With the current popularity of cluster computing systems, it is increasingly important to understand...
In this paper, performance of multistage interconnection network with wormhole routing and packet sw...
The networks employed in multicomputer architectures share many characteristics with those encounter...