4-Channel, 100 Gbps Inductorless Optical Receiver Analog Front-End in CMOS for Optical Interconnect

In this paper, a 4-channel, 100 Gbps inductorless optical receiver analog front-end fabricated in a 55 nm bulk-CMOS technology is presented. Active feedback technique is widely adopted to improve the performance of the optical receiver without the area-occupied inductors. To alleviate the voltage headroom stress of the local feedback loop in traditional regulated cascode transimpedance amplifier, the common gate amplifier is inserted before the traditional common source feedback stage. And the cross-couple active feedback stage provides a negative signal path to extend the bandwidth of the local feedback loop. Multi-stage limiting amplifier with active negative and positive feedback stages are employed to extend bandwidth and acquire high gain simultaneously. The optical receiver was realized as 4-element arrays occupying the area of $800\,\,\mu \text{m}\,\,\times 1800\,\,\mu \text{m}$ , whereas the core area of each channel is just $275\,\,\mu \text{m}\,\,\times 650\,\,\mu \text{m}$ . The measured 3-dB bandwidth reaches 22.8 GHz, sufficient for 25-Gbps operation. For an input voltage of 2.5 mV $_{\text {p-p}}$ , the optical receiver achieves a BER $= 10^{-12}$ at 25-Gbps PRBS7, and 310 mV differential output voltage is delivered. From the supply voltage of 1.2 V, the test chip consumes the power of 226 mW and exhibits the power efficiency of 2.3 mW/Gb/s, when 25-Gbps PRBS31 is supplied