International audienceIn this paper, we propose an approach combining the use of distributed hardware tasks implemented as finite state machines (FSM) and power gating techniques to obtain ultra low-power implementations. We target for control dominated applications represented as control task graphs, and propose a complete flow including a C to hardware task compiler. Our approach is validated experimentally and shows impressive improvement over software implementation on leading edge low-power microcontrollers such as the MSP430
[[abstract]]In this paper, we investigate the low-power synthesis for Extended Finite Stat...
Part 2: Non-functional Aspects of Embedded SystemsInternational audienceTo achieve the highest level...
W artykule przedstawiono nowy algorytm kodowania stanów wewnętrznych automatu skończonego. Głównym z...
International audienceIn this paper, we propose an approach combining the use of distributed hardwar...
The paper describes an algorithm for state encoding finite state machines targeting low-power realiz...
International audienceInterest in automated methodologies increased last decades due to the ever-gro...
Power dissipation has become one of the main issues during embedded systems design in the recent yea...
[[abstract]]Power reduction can be achieved by turning off portions of circuits that are idle. Unlik...
The problem of minimizing the power consumption in synchronous sequential circuits is explored in th...
Due to the recent popularity of context-sensitive applications, there is a growing need for reliable...
[[abstract]]In this paper, we investigate a low-power architecture for designs modeled as an Extende...
A fully digital self-adjusting high efficiency power supply system has been developed based on an FS...
The paper concerns low power design of synchronous FSM and power estimation regarding a given input ...
Modern FPGAs contain on-chip synchronous embedded memory blocks (SEMBs), these memory blocks can be ...
The final publication is available at Springer via http://dx.doi.org/10.1007/3-540-46117-5_37Proceed...
[[abstract]]In this paper, we investigate the low-power synthesis for Extended Finite Stat...
Part 2: Non-functional Aspects of Embedded SystemsInternational audienceTo achieve the highest level...
W artykule przedstawiono nowy algorytm kodowania stanów wewnętrznych automatu skończonego. Głównym z...
International audienceIn this paper, we propose an approach combining the use of distributed hardwar...
The paper describes an algorithm for state encoding finite state machines targeting low-power realiz...
International audienceInterest in automated methodologies increased last decades due to the ever-gro...
Power dissipation has become one of the main issues during embedded systems design in the recent yea...
[[abstract]]Power reduction can be achieved by turning off portions of circuits that are idle. Unlik...
The problem of minimizing the power consumption in synchronous sequential circuits is explored in th...
Due to the recent popularity of context-sensitive applications, there is a growing need for reliable...
[[abstract]]In this paper, we investigate a low-power architecture for designs modeled as an Extende...
A fully digital self-adjusting high efficiency power supply system has been developed based on an FS...
The paper concerns low power design of synchronous FSM and power estimation regarding a given input ...
Modern FPGAs contain on-chip synchronous embedded memory blocks (SEMBs), these memory blocks can be ...
The final publication is available at Springer via http://dx.doi.org/10.1007/3-540-46117-5_37Proceed...
[[abstract]]In this paper, we investigate the low-power synthesis for Extended Finite Stat...
Part 2: Non-functional Aspects of Embedded SystemsInternational audienceTo achieve the highest level...
W artykule przedstawiono nowy algorytm kodowania stanów wewnętrznych automatu skończonego. Głównym z...