International audienceIn this paper a FPGA implementation of a 4 times 4 MIMO MMSE Equalizer based on the QR factorization technique is presented. Considering fast varying channels a new filter is computed at each new channel realization thanks to an efficient architecture of matrix triangularization. The QR decomposition is performed with only 6 unrolled coordinate rotation digital computer (CORDIC) operators, which are efficiently exploited to minimize the latency of computation. Soft LLR obtained in output of the equalizer are validated on an FPGA hardware bench including a 4 times 4 Rayleigh fading channel and turbo- coding
Abstract For rapidly time-varying channels, the performance of (orthogonal frequency division multip...
Abstract—A fixed-point implementation of a minimum mean square error (MMSE) based frequency domain (...
The orthogonality of the cyclic prefix orthogonal frequency division multiplexing (CP-OFDM) modulati...
International audienceIn this paper a FPGA implementation of a 4 times 4 MIMO MMSE Equalizer based o...
Abstract—In this paper, a field programmable gate array (FPGA) implementation of a linear minimum me...
Abstract—This paper presents a modified interpolation-based QR decomposition algorithm for the group...
AbstractThis paper presents an FPGA implementation of Maximum likelihood (ML), zero forcing (ZF) and...
Computation of MIMO equalization matrices is a critical and computationally intensive part of today'...
Communication over a MIMO (multiple-inputmultiple- output) channel promises several advantages: incr...
We propose low-complexity block turbo equalizers for orthogonal frequency-division multiplexing (OFD...
International audienceThis paper presents an architectural solution for a MMSE equalizer of iterativ...
International audienceA novel 16-bit flexible Application-Specific Instruction-set Processor for an ...
Conference PaperIn this paper,we present a reduced QRD-M matrix symbol detector in MIMO-OFDM systems...
Abstract—We propose low-complexity block turbo equalizers for orthogonal frequency-division multiple...
We present iterative turbo-like equalizers for multiple-input multi-ple-output (MIMO) orthogonal fre...
Abstract For rapidly time-varying channels, the performance of (orthogonal frequency division multip...
Abstract—A fixed-point implementation of a minimum mean square error (MMSE) based frequency domain (...
The orthogonality of the cyclic prefix orthogonal frequency division multiplexing (CP-OFDM) modulati...
International audienceIn this paper a FPGA implementation of a 4 times 4 MIMO MMSE Equalizer based o...
Abstract—In this paper, a field programmable gate array (FPGA) implementation of a linear minimum me...
Abstract—This paper presents a modified interpolation-based QR decomposition algorithm for the group...
AbstractThis paper presents an FPGA implementation of Maximum likelihood (ML), zero forcing (ZF) and...
Computation of MIMO equalization matrices is a critical and computationally intensive part of today'...
Communication over a MIMO (multiple-inputmultiple- output) channel promises several advantages: incr...
We propose low-complexity block turbo equalizers for orthogonal frequency-division multiplexing (OFD...
International audienceThis paper presents an architectural solution for a MMSE equalizer of iterativ...
International audienceA novel 16-bit flexible Application-Specific Instruction-set Processor for an ...
Conference PaperIn this paper,we present a reduced QRD-M matrix symbol detector in MIMO-OFDM systems...
Abstract—We propose low-complexity block turbo equalizers for orthogonal frequency-division multiple...
We present iterative turbo-like equalizers for multiple-input multi-ple-output (MIMO) orthogonal fre...
Abstract For rapidly time-varying channels, the performance of (orthogonal frequency division multip...
Abstract—A fixed-point implementation of a minimum mean square error (MMSE) based frequency domain (...
The orthogonality of the cyclic prefix orthogonal frequency division multiplexing (CP-OFDM) modulati...