International audienceIn this paper a method for generating HDL code from SIGNAL formal specifications, is described. Applying two transformations on the initial specification yields functionally equivalent RTL HDL code. The functional equivalence is formally proven. The methodology allows component re-usability and enables the validation of their integration at the specification level. We anticipate that the principles presented in this paper, will be applied in the framework of a cooperation with Motorola
This thesis deals with proposal and implementation of advanced transformations used du- ring generat...
High performance provided by multi-processor System-on-Chips (MPSoCs) often induces designers to cho...
Despite all the effort spent in testing, analyzing, and formally verifying software, a program is ul...
International audienceIn this paper a method for generating HDL code from SIGNAL formal specificatio...
The microelectronics industry has been undergoing a pace of change in order to cope with the increas...
Virtual prototyping of embedded systems generally relies on the reuse of already developed component...
Submitted on behalf of EDAA (http://www.edaa.com/)International audienceIn this paper we formally de...
International audienceSignal is a high-level declarative data flow language and has been successfull...
International audienceWe report on the implementation of a certified compiler for a high-level hardw...
As a result of enormous competition in the system-on-chip industry, the current trends of system lev...
We present a High-Level Python-based Hardware Description Language (ARGG-HDL), It uses Python as its...
Abstract: In the paper we use a model of real-world process, represented with well-posed transfer fu...
With the advent of heterogeneous multi-processor system-on-chips (MPSoCs), hardware/software partiti...
Existing heuristics and algorithms used in High-Level Synthesis typically assume a direct mapping of...
Includes bibliographical references (page 34)In this project a Software Defined Radio receiver post ...
This thesis deals with proposal and implementation of advanced transformations used du- ring generat...
High performance provided by multi-processor System-on-Chips (MPSoCs) often induces designers to cho...
Despite all the effort spent in testing, analyzing, and formally verifying software, a program is ul...
International audienceIn this paper a method for generating HDL code from SIGNAL formal specificatio...
The microelectronics industry has been undergoing a pace of change in order to cope with the increas...
Virtual prototyping of embedded systems generally relies on the reuse of already developed component...
Submitted on behalf of EDAA (http://www.edaa.com/)International audienceIn this paper we formally de...
International audienceSignal is a high-level declarative data flow language and has been successfull...
International audienceWe report on the implementation of a certified compiler for a high-level hardw...
As a result of enormous competition in the system-on-chip industry, the current trends of system lev...
We present a High-Level Python-based Hardware Description Language (ARGG-HDL), It uses Python as its...
Abstract: In the paper we use a model of real-world process, represented with well-posed transfer fu...
With the advent of heterogeneous multi-processor system-on-chips (MPSoCs), hardware/software partiti...
Existing heuristics and algorithms used in High-Level Synthesis typically assume a direct mapping of...
Includes bibliographical references (page 34)In this project a Software Defined Radio receiver post ...
This thesis deals with proposal and implementation of advanced transformations used du- ring generat...
High performance provided by multi-processor System-on-Chips (MPSoCs) often induces designers to cho...
Despite all the effort spent in testing, analyzing, and formally verifying software, a program is ul...