International audienceIn this paper we present a technique for fast approximately timed simulation of software within a virtual prototyping framework. Our method performs a static analysis of the program control flow graph to construct annotations of the simulated program, combined with dynamic performance information. The static analysis estimates execution time based on a target architecture model. The delays introduced by instruction fetch and data cache misses are evaluated dynamically. At the end of each block, static and dynamic information are combined with branch target prediction to compute the total execution time of the blocks. As a result, we can provide approximate performance estimates with a high simulation speed that is stil...
High-level cost and performance estimation, coupled with a fast hardware/software co-simulation fram...
The limited execution speed of current full system simulators restricts their applicability for dyna...
Popular microarchitecture simulators are typically several orders of magnitude slower than the syste...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
textWith increasing complexity and software content, modern embedded platforms employ a heterogeneou...
textWith increasing complexity and software content, modern embedded platforms employ a heterogeneou...
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system de...
This paper presents an approach for cycle-accurate simulation of embedded software by integration in...
Abstract—A new timing generation method is proposed for the performance analysis of embedded softwar...
A generic and retargetable tool flow is presented that en-ables the export of timing data from softw...
High-level cost and performance estimation, coupled with a fast hardware/software co-simulation fram...
The limited execution speed of current full system simulators restricts their applicability for dyna...
Popular microarchitecture simulators are typically several orders of magnitude slower than the syste...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
International audienceIn this paper we present a technique for fast approximately timed simulation o...
textWith increasing complexity and software content, modern embedded platforms employ a heterogeneou...
textWith increasing complexity and software content, modern embedded platforms employ a heterogeneou...
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system de...
This paper presents an approach for cycle-accurate simulation of embedded software by integration in...
Abstract—A new timing generation method is proposed for the performance analysis of embedded softwar...
A generic and retargetable tool flow is presented that en-ables the export of timing data from softw...
High-level cost and performance estimation, coupled with a fast hardware/software co-simulation fram...
The limited execution speed of current full system simulators restricts their applicability for dyna...
Popular microarchitecture simulators are typically several orders of magnitude slower than the syste...