ATOMISTIC MODELING OF COUPLED ELECTRON-PHONON TRANSPORT IN NANOSTRUCTURES

Electronics industry has been developing at a tremendous rate for last five decades and currently is one of the biggest industries in the world. The key to the rapid growth of electronics industry is innovation that made possible the constant scaling of transistors with reduced cost and improved performance. Scaling transistors were simpler at the beginning, but currently as the gate length of transistors has reached few nanometers, different short channel effects have emerged and power density of transistors has also increased drastically, which made further scaling much more challenging. To study electro-thermal transport in these reduced dimensionality devices, continuum models are no longer sufficient. In this work, the electrical and thermal transport properties have been modeled by solving Boltzmann Transport Equation (BTE) for electrons and phonons, respectively, using the Monte Carlo (MC) technique. To solve BTE for the phonons, a coupled Molecular Mechanics-Monte Carlo approach is employed where phonon band-structure is obtained using the atomistic modified Valence Force Field (VFF) model and is coupled with a Monte Carlo Phonon Transport kernel which solves the BTE for phonons. The phonon-phonon scattering is modeled in relaxation time approximation (RTA) using Holland’s formalism. Diffusive boundary scattering for phonons has been modeled using the Beckmann-Kirchhoff (B-K) surface roughness scattering model taking into account the effects of phonon wavelength, incident angles and degree of surface roughness. The effect of rough surface on longitudinal acoustic (LA) and transverse acoustic (TA) phonon branches has been studied with the help of the B-K model and it has been found that, at elevated temperatures, there is less backscattering to the LA branch due to rough surface. Effort has been made then to couple the developed phonon Monte Carlo transport simulator with an electron Monte Carlo transport simulator to study the origin and effects of self-heating in a nanoscale field-effect transistor (FET). In contrast to the widely used continuum model, where Fourier heat diffusion equation is usually solved to describe the thermal transport, the simulator developed in this dissertation treats both the electrons and the phonons at the particle level. Acoustic and intervalley g and f type electron-phonon scattering mechanisms are considered and the resulting local temperature modification has been used to bridge the electron and phonon transport paths. Phonon transport at the oxide-silicon interface has been modeled using the Diffuse Mismatch (DM) model, whereas, the phonons in the oxide have been described using the Debye model and temperature and frequency dependent relaxation time. The simulator is then benchmarked and used to study the electron-phonon transport processes in a FinFET device with a gate length of 18 nm, channel width of 4 nm, and a fin height of 8 nm. Preliminary results show that there can be a current degradation of as high as ~9.56% due to self-heating effect. Also, temperature in the entire channel region could rise due to self-heating. The maximum temperature rise in the channel region is found to be ~30K