An analysis of a feedback-delay model using ternary simulation (FDM analysis)

An analysis of a Feedback - Delay Model Using Ternary Simulation is a study of the effectiveness of ternary simulation as an analysis tool of asynchronous circuits. The thesis is the first step towards the formal study of asynchronous circuits. The tool is verified and presented both theoretically and technically by first, studying ternary algebra and second, constructing two prototypes of a feedback-delay model. The prototypes are used to prove the validity of the algorithms of ternary simulation. In effect, there are two outputs, first, from the software program that supports the theoretical side and second, from the SRAM that is hardwired to the prototypes. The latter supports the technical side of the thesis. Consequently, the comparable outputs will verify the effectiveness of ternary simulation as an analysis tool of asynchronous circuits