Implant Annealing of Sic in a Silane Ambient

The goal of this research project was to develop a new implant annealing process using silane overpressure to maintain crystal integrity. After ion implantation the surface of the SiC wafer is damaged due to high energy of the implant ions. In addition the doping activation is very low. To overcome these problems a new implant annealing process was developed to rectify the surface damage and increase the dopant activation. SiC implant annealing was performed in the silicon carbide (SiC) chemical vapor deposition (CVD) reactor in the Emerging Materials Research Laboratory (EMRL) at Mississippi State University. A process was developed to eliminate surface step bunching, which is evident in argon annealed crystals. The process gas used in the new technique was silane (3 % SiH4 in 97% UHP Ar). The anneal run time was 30 minutes with argon flow rate at 6 slm and silane flow rate at 6 sccm. SiC material (n and p type epitaxial layers) and devices (JBS Diodes and LDMOSFET?s) were annealed using the silane over pressure developed during this research. The process results were characterized using tools such as optical micrograph, capacitance-voltage (C-V), Atomic force microscopy (AFM) and X-ray photoelectron spectroscopy (XPS). These characterization tools were mainly used to determine the surface roughness of the SiC crystal and the dopant activation after annealing. As compared to an Ar anneal, the SiC material and devices annealed in the silane ambient had a better surface. An empirical process chemistry model was developed to support the experimental results. The model developed showed that the partial pressure of Si is greater than the vapor pressure of SiC in the substrate. Thus it is believed that the partial pressure of Si suppressed any Si out-diffusion from the SiC substrate, thereby maintaining the crystal surface integrity. The model also provided silane flow rates for higher temperature anneals which may be necessary to fully activate other ion species