The comparator is an essential element in concurrent error detection (CED). To ensure the correctness of error detection processes, comparators must be totally self-checking (TSC): any single fault occurring in the comparator must be detected by at least one normal input pattern, and before the detection of that fault, no erroneous output must be guaranteed. In this paper, an area-time efficient static CMOS TSC comparator design is presented. This comparator uses only eight transistors and is totally self-checking with respect to stuck-at faults, stuck-open, stuck-on, briding faults, and breaks
Abstract:- This paper presents methods for designing totally self-checking Mealy type synchronous se...
AbstractThis paper presents some new techniques for reducing the transistor count oof MOS implementa...
This paper considers the design of an efficient, robustly testable, CMOS Totally Self-Checking (TSC)...
The comparator is an essential element in concurrent error detection (CED). To ensure the correctnes...
108 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1985.A Totally Self-Checking (TSC)...
When a comprehensive fault model is considered, static CMOS VLSI has long been prohibited from reali...
This paper presents a novel method for designing Totally Self-Checking (TSC) m-out-of-n code checker...
[[abstract]]The authors present a novel approach to designing TSC (totally self-checking) CMOS circu...
ISBN: 0818628707The authors present a novel scheme to implement self-checking circuits in static CMO...
advantages, it suffers from robustness problem caused by hard, soft and timing errors. The robustnes...
This paper proposes a built-in self-test (BIST) scheme for detecting catastrophic faults in dynamic ...
A technique for designing totally self-checking (TSC) FCMOS (Fully Complementary MOS) designs for mu...
A design methodology for on-line testing analog linear fully differential (FD) circuits is presented...
This paper presents some new techniques for reducing the transistor count oof MOS implementations of...
Abstract:- This paper presents methods for designing totally self-checking Mealy type synchronous se...
Abstract:- This paper presents methods for designing totally self-checking Mealy type synchronous se...
AbstractThis paper presents some new techniques for reducing the transistor count oof MOS implementa...
This paper considers the design of an efficient, robustly testable, CMOS Totally Self-Checking (TSC)...
The comparator is an essential element in concurrent error detection (CED). To ensure the correctnes...
108 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1985.A Totally Self-Checking (TSC)...
When a comprehensive fault model is considered, static CMOS VLSI has long been prohibited from reali...
This paper presents a novel method for designing Totally Self-Checking (TSC) m-out-of-n code checker...
[[abstract]]The authors present a novel approach to designing TSC (totally self-checking) CMOS circu...
ISBN: 0818628707The authors present a novel scheme to implement self-checking circuits in static CMO...
advantages, it suffers from robustness problem caused by hard, soft and timing errors. The robustnes...
This paper proposes a built-in self-test (BIST) scheme for detecting catastrophic faults in dynamic ...
A technique for designing totally self-checking (TSC) FCMOS (Fully Complementary MOS) designs for mu...
A design methodology for on-line testing analog linear fully differential (FD) circuits is presented...
This paper presents some new techniques for reducing the transistor count oof MOS implementations of...
Abstract:- This paper presents methods for designing totally self-checking Mealy type synchronous se...
Abstract:- This paper presents methods for designing totally self-checking Mealy type synchronous se...
AbstractThis paper presents some new techniques for reducing the transistor count oof MOS implementa...
This paper considers the design of an efficient, robustly testable, CMOS Totally Self-Checking (TSC)...