Implementation of quick sort algorithm with use of cuda technology and dynamic parallelism

V diplomski nalogi preučujemo algoritem za hitro urejanje in paralelizacijo algoritma na grafični procesni enoti. Implementirali smo algoritem za hitro urejanje na grafični procesni enoti. V ta namen smo uporabili arhitekturo CUDA in funkcionalnost dinamičnega paralelizma, ki omogočata zagon programov neposredno z grafične procesno enote. V nadaljevanju smo primerjali hitrosti urejanja z referenčnima algoritmoma hitro urejanje na centralni procesni enoti in bitono urejanje na grafični procesni enoti. Ugotovili smo, da je paralelno urejanje na grafični procesni enoti na dovolj velikem številu elementov hitrejše kot urejanje na centralni procesni enoti.In the diploma thesis, we study the quicksort algorithm and parallelization of the algorithm on a graphic processing unit. We implemented the quick sort algorithm on a graphic processing unit. We used the CUDA architecture and the dynamic parallelism functionality that allows program kernels to be invoked directly from the graphic processing unit. Next, we compared the sorting speeds with the reference quicksort algorithms on the CPU and bitonic sort on the graphic processing unit. We concluded that parallel sorting on a graphic processing unit on a sufficient number of elements is faster than sorting on a central processing unit