Efficient design methodologies for hardware-based signal processing of elementary functions in wireless communication systems

Wireless communication is a key aspect of current and future data communication, thus, it is used in several different application areas of daily life. Due to the development in recent years, it is most likely that the overall processing effort in this scope will increase significantly. For example, within the scope of mobile telephony, there is a steady growth of subscribers, which will lead to a higher amount of payload and transceiver activity. For wireless devices, high battery lifetime is also demanded. In order to fulfill the above requirements, efficient digital signal processing has proven itself to be a promising approach. To this end, the signal processing task, e.g. the calculation of algorithms, is directly mapped onto the underlying hardware. However, for future wireless communication systems, this approach will lead to insufficient results, due to the expected increase of algorithmic complexity. This thesis focusses on approximate signal processing of elementary functions in the context of digital circuit design for wireless communication. An adapted design methodology is presented that uses efficient function segmentation as well as hardware-optimized linear equations, in order to reduce the overall signal processing effort. As the translation of the function approxmiation to an equivalent hardware description is performed automatically, this can be embedded into the digital design flow. In this work, several elementary functions from mobile communication and wireless sensor network applications are approximated by this methodology. Model-based simulation and validation is performed, as well as corresponding hardware implementations are presented for each application. Finally, all results are evaluated by comparison to appropriate references