Innovative communication processors: A survey

Some existing innovative processors for execution of multilayer protocols are surveyed in order to identify performance limits and processor architectural trade-offs. The survey is restricted to packet or message handling processors with dedicated software and/or hardware. The processors are compared with respect to; performance, i.e. throughput and delay, to available protocols, and to implementation trade-offs, i.e. modularity, service access point accessibility, interface to host machine, dependability, implementation language, buffer handling, and context switch with state information. Of special interest are processors for protocols designed according to the OSI-model. One conclusion is that the implementation of buffer handling and context switch is crucial for the performance. The surveyed processors are divided into two categories; switches for X.25/ARPANET and controllers for Local Area Networks. The switches are often designed as multiprocessor systems, optimizing throughput, while the controllers often are designed with dedicated processors and chips, optimizing not only for throughput, but also for delay and for off-loading the host.Oríginal report number R87003.