This paper proposes an inexact Baugh-Wooley Wallace tree multiplier with novel architecture for inexact 4:2 compressor optimised for realisation using reversible logic. The proposed inexact 4:2 compressor has ±1 Error Distance (ED) and 12.5% Error Rate (ER). The efficacy of the proposed reversible logic based realisation of the proposed inexact 4:2 compressor and Baugh-Wooley Wallace tree multiplier is measured in scales of Gate Count (GC), Quantum Cost (QC), Garbage Output (GO) and Ancilla Input (AI). The proposed inexact 4:2 compressor is able to reduce reversible logic realisation metrics GC, QC, GO and AI by 50%, 15%, 25% and 11.11% as compared to reversible logic realisation of exact 4:2 compre...
In this paper, a novel 8-bit approximate multiplier is proposed based on three novel 4:2 approximate...
High latency and efficient addition of multiple operands is an essential operation in any computatio...
The aim of this paper is to study 4x4 Wallace tree multiplier. In high performance processing units ...
Abstract- Reversible logic is a promising field of research that finds applications in low power com...
High speed multiplication is one of the critical function in a range of very large scale integration...
Inexact (or approximate) computing is an attractive paradigm for digital processing at nanometric sc...
Approximate computing is a promising approach for reducing power consumption and design complexity i...
Abstract: An area-efficient high Wallace tree multiplier using adders is presented in this paper. Th...
Multiplication process is often used in digital signal processing systems, microprocessors designs, ...
Wallace tree multipliers provide a power-efficient strategy for high speed multiplication. The use o...
In this paper, a 8x8 multiplier is realized by using 4-2 and 5-2 compressors. Low-power high speed 4...
Abstract — A systems performance is generally determined by the speed of the multiplier since multip...
Multipliers are the significant part of the present technology as they are mostly used in the convol...
Abstract-- Multipliers play a key role in the high performance digital systems and DSP applications....
Abstract — Now A days reversible logic is used in various field and some of their applications are q...
In this paper, a novel 8-bit approximate multiplier is proposed based on three novel 4:2 approximate...
High latency and efficient addition of multiple operands is an essential operation in any computatio...
The aim of this paper is to study 4x4 Wallace tree multiplier. In high performance processing units ...
Abstract- Reversible logic is a promising field of research that finds applications in low power com...
High speed multiplication is one of the critical function in a range of very large scale integration...
Inexact (or approximate) computing is an attractive paradigm for digital processing at nanometric sc...
Approximate computing is a promising approach for reducing power consumption and design complexity i...
Abstract: An area-efficient high Wallace tree multiplier using adders is presented in this paper. Th...
Multiplication process is often used in digital signal processing systems, microprocessors designs, ...
Wallace tree multipliers provide a power-efficient strategy for high speed multiplication. The use o...
In this paper, a 8x8 multiplier is realized by using 4-2 and 5-2 compressors. Low-power high speed 4...
Abstract — A systems performance is generally determined by the speed of the multiplier since multip...
Multipliers are the significant part of the present technology as they are mostly used in the convol...
Abstract-- Multipliers play a key role in the high performance digital systems and DSP applications....
Abstract — Now A days reversible logic is used in various field and some of their applications are q...
In this paper, a novel 8-bit approximate multiplier is proposed based on three novel 4:2 approximate...
High latency and efficient addition of multiple operands is an essential operation in any computatio...
The aim of this paper is to study 4x4 Wallace tree multiplier. In high performance processing units ...