Lightweight Real-Time Lossless Software Compression of Trace Data

Powerful System-on-Chip (SoC) produced today has an increasing complexity, featuringmore processors and integrated specialized hardware. This is the case with the EricssonMany-Core Architecture (EMCA) that runs the complex radio modulation standardswithin 3G, 4G and 5G. Such complicated systems require trace data to debug and verifyits behavior. Massive amounts of hardware and software traces can be produced in ashort time. Data compression is a technique to reduce the amount of memory spacerequired by reducing redundancy in the information. Compression of trace data leads toincreased throughput out of the SoC and less space required to store the data. However,it doesn’t come for free since the algorithms used for compression are computationaldemanding. This results in trade-offs between compression factor, consumed clock cyclesand occupied memory space. This master thesis investigates the possibility to compress the trace data produced inreal-time by the EMCA with a software implementation. The EMCA real-time tracearchitecture and its memory layers limit the possible software solutions. By a thoroughinvestigation of suitable compression algorithms and MATLAB experiments, the LZSSalgorithm is the given choice for the EMCA. Three different variants of the LZSS algorithmwere implemented resulting in a trade-off curve between compression factor and clockcycles. The average result of software and hardware trace data compressed ranging from1.7 to 2.4 compression factor, which is good for a lightweight SoC solution. Though, thepure software compression were quite slow as the algorithm consumed 34 to 371 clockcycles per byte encoded, to achieve the respective compression factor. The results showeda highly diminishing return in compression factor when investing more clock cycles