Hardware for lightweight cryptographic implementation

This bachelor thesis deals with the topic of lightweight cryptography and the implementation of a selected cipher on a field programmable gate array (FPGA). Thesis first deals with the theory, where hardware elements, general cryptography and lightweight cryptography are described with focus on the LBlock and PRESENT ciphers. It then describes the selection of a cipher type and then the selection of a particular lightweight cryptography cipher. Next the LBlock cipher is selected, implemented, and tested as a custom intellectual property (IP) block using a hardware descriptive language for very fast integrated circuits (VHDL). This block is used in the block design to implement the encryptor on the ZYBO-Z7 development board. The input and output data handling is implemented on the Zynq-7000 processing system chip, which passes the data to the programmable logic. Finally this communication and implementation is described where the operational modes used for the LBlock cipher are cipher feedback mode and output feedback mode. For these operational modes, measurements are made to determine the encryption speed of the data stored on the microSD card and the pitfalls resulting from this encryption are described