Effect of thermal oxide film on scalable fabrication of silicon nanowire arrays using Metal Assisted Chemical Etching

Over the last several decades, the demand for real-time data processing and storage has exponentially increased and pushed the semiconductor field to its fabrication limits. Traditional methods of semiconductor nanomanufacturing, like lithography and reactive ion etching (RIE), suffer from feature resolution and etch taper limits for devices comprising sub-10 nm nanofabrication nodes. Methods like the ones mentioned above are both expensive and difficult to manufacture to keep up with continued scaling requirements of semiconductor fabrication. This thesis presents a fabrication method and metrology characterization of silicon nanowire arrays using a Metal Assisted Chemical Etching (MACE) approach. MACE is a simple, low-cost fabrication technique that allows for high aspect ratio silicon nanostructures to be successfully fabricated without sacrificing geometry fidelity, making it a promising etching method for large-scale semiconductor manufacturing. In this research, small-scale MACE was demonstrated on silicon coupons with an initial process window of 0 nm – 100 nm oxide thickness. Then, a down-selected process window of 10 nm – 50 nm oxide thickness was successfully reproduced on a full-wafer scale (100 mm diameter silicon wafers) at different etchant solution concentrations. The oxide layer serves as a sacrificial layer between the silicon and resist to allow a consistent etching starting point, thus improving the etch depth uniformity and aspect ratios of silicon nanowires. The silicon nanowires were characterized using local scanning electron microscopy (SEM) images by mapping the areas of the wafer as North, South, East, and West to measure critical dimensions such as height and diameter, as well as to observe phenomena such as nanowire collapse.Mechanical Engineerin