Adaptive Impedance-Conditioned Phase-Locked Loop for the VSC Converter Connected to Weak Grid

From MDPI via Jisc Publications RouterHistory: accepted 2021-09-17, pub-electronic 2021-09-23Publication status: PublishedIn this paper, an adaptive version of the impedance-conditioned phase-locked loop (IC-PLL), namely the adaptive IC-PLL (AIC-PLL), is proposed. The IC-PLL has recently been proposed to address the issue of synchronisation with a weak AC grid by supplementing the conventional synchronous reference frame phase-locked loop (SRF-PLL) with an additional virtual impedance term. The resulting IC-PLL aims to synchronise the converter to a remote and stronger point in the grid, hence increasing the upper bound on the achievable power transfer achieved by the VSC converter connected to the weak grid. However, the issue of the variable grid strength imposes another challenge in the operation of the IC-PLL. This is because the IC-PLL requires impedance estimation methods to estimate the value of the virtual impedance part. In AIC-PLL, the virtual impedance part is estimated by appending another dynamic loop in the exciting IC-PLL. In this method, an additional closed loop is involved so that the values of the virtual inductance and resistance are internally estimated and adapted. Hence, the VSC converter becomes effectively viable for the case of the grid strength variable, where the estimation of the grid impedance becomes unnecessary. The results show that the converter that relies on AIC-PLL has the ability to transfer power that is approximately equal to the theoretical maximum power while maintaining satisfactory dynamic performance