A fixed-point simd array processor and its applications to video compression coding

A review of image compressing algorithms and their processor architectures -- MPEG standard -- Motion estimation algorithm -- Processor architecture review -- SIMD architecture of the pulse chip -- Implementing a convolution on pulse -- The convolution algorithm versus pulse architectural features -- Structure of the convolution software -- Motion estimation algorithms and implementations -- Motion estimation algorithm -- Gradual ful search method and full search algorithm with the pulse chip -- DCT & IDCT algorithms and implementations -- Image processing with pulse chips and a C40 processor