This dissertation maps various kernels and applications to a spectrum of programming models and architectures and also presents architecture-aware algorithms for different systems. The kernels and applications discussed in this dissertation have widely varying computational characteristics. For example, we consider both dense numerical computations and sparse graph algorithms. This dissertation also covers emerging applications from image processing, complex network analysis, and computational biology. We map these problems to diverse multicore processors and manycore accelerators. We also use new programming models (such as Transactional Memory, MapReduce, and Intel TBB) to address the performance and productivity challenges in the prob...
Graphs' versatile ability to represent diverse relationships, make them effective for a wide range o...
Supervisor: Dr. Michela Becchi.Includes vita.Over the last decade, many-core Graphics Processing Uni...
This thesis contributes to the area of hardware support for parallel programming by introducing new ...
Emerging architectures, such as next generation microprocessors, graphics processing units, and Inte...
Irregular algorithms such as graph algorithms, sorting, and sparse matrix multiplication, present nu...
Mathematicians and computational scientists are often limited in their ability to model complex phen...
Modern high performance systems are becoming increasingly complex and powerful due to advancements i...
The combination of low-cost imaging chips and high-performance, multicore, embedded processors heral...
Today's hardware is becoming more and more parallel. While embarrassingly parallel codes, such as hi...
This thesis describes the efficient design of a future many-core processor that can provide higher p...
Accelerators, such as GPUs and Intel Xeon Phis, have become the workhorses of high-performance compu...
thesisAt the beginning of the 21st century, it became apparent that the performance gains associated...
Concurrently exploring both algorithmic and architectural optimizations is a new design paradigm. Th...
The rise of chip multiprocessing or the integration of multiple general purpose processing cores on ...
The area of computing is seeing parallelism increasingly being incorporated at various levels: from ...
Graphs' versatile ability to represent diverse relationships, make them effective for a wide range o...
Supervisor: Dr. Michela Becchi.Includes vita.Over the last decade, many-core Graphics Processing Uni...
This thesis contributes to the area of hardware support for parallel programming by introducing new ...
Emerging architectures, such as next generation microprocessors, graphics processing units, and Inte...
Irregular algorithms such as graph algorithms, sorting, and sparse matrix multiplication, present nu...
Mathematicians and computational scientists are often limited in their ability to model complex phen...
Modern high performance systems are becoming increasingly complex and powerful due to advancements i...
The combination of low-cost imaging chips and high-performance, multicore, embedded processors heral...
Today's hardware is becoming more and more parallel. While embarrassingly parallel codes, such as hi...
This thesis describes the efficient design of a future many-core processor that can provide higher p...
Accelerators, such as GPUs and Intel Xeon Phis, have become the workhorses of high-performance compu...
thesisAt the beginning of the 21st century, it became apparent that the performance gains associated...
Concurrently exploring both algorithmic and architectural optimizations is a new design paradigm. Th...
The rise of chip multiprocessing or the integration of multiple general purpose processing cores on ...
The area of computing is seeing parallelism increasingly being incorporated at various levels: from ...
Graphs' versatile ability to represent diverse relationships, make them effective for a wide range o...
Supervisor: Dr. Michela Becchi.Includes vita.Over the last decade, many-core Graphics Processing Uni...
This thesis contributes to the area of hardware support for parallel programming by introducing new ...