Add to ORKGInternational audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the ILC has been designed and successfully tested. Optimized for a detector capacitance of 10 pF, it includes four channels of charge integration, pulse shaping, a 16-deep analogue sampler triggered on input analogue sums, and parallel analogue to digital conversion. Tests results of the full chain are reported, demonstrating the behaviour and performance of the full sampling process and analogue to digital conversion. Each channel dissipates less than one milli-Watt static power
Les détecteurs en silicium sont largement utilises en la Physique de Hautes Energies et representent...
In the context of the Silicon tracking for a Linear Collider (SiLC) R&D collaboration, a highly comp...
International audienceFor the years to come, Silicon strips detectors will be read using the smalles...
International audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the I...
International audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the I...
International audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the I...
International audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the I...
A CMOS 130nm evaluation chip intended to read Silicon strip detectors at the ILC has been designed a...
Electronic Conference Proceedings (eConf)A highly integrated readout scheme for Silicon trackers mak...
Electronic Conference Proceedings (eConf)A highly integrated readout scheme for Silicon trackers mak...
For the years to come, Silicon strips detectors will be read using the smallest available integrated...
A highly integrated readout scheme for Silicon trackers making use of Deep Sub-Micron CMOS electroni...
A highly integrated readout scheme for Silicon trackers making use of Deep Sub-Micron CMOS electroni...
In the context of the Silicon for a Linear Collider (SiLC) R&D supported by the EUDET I3-FP6, a ...
A highly integrated Front-End readout and Data Acquisition scheme for Silicon trackers is presented....
Les détecteurs en silicium sont largement utilises en la Physique de Hautes Energies et representent...
In the context of the Silicon tracking for a Linear Collider (SiLC) R&D collaboration, a highly comp...
International audienceFor the years to come, Silicon strips detectors will be read using the smalles...
International audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the I...
International audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the I...
International audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the I...
International audienceA CMOS 130nm evaluation chip intended to read Silicon strip detectors at the I...
A CMOS 130nm evaluation chip intended to read Silicon strip detectors at the ILC has been designed a...
Electronic Conference Proceedings (eConf)A highly integrated readout scheme for Silicon trackers mak...
Electronic Conference Proceedings (eConf)A highly integrated readout scheme for Silicon trackers mak...
For the years to come, Silicon strips detectors will be read using the smallest available integrated...
A highly integrated readout scheme for Silicon trackers making use of Deep Sub-Micron CMOS electroni...
A highly integrated readout scheme for Silicon trackers making use of Deep Sub-Micron CMOS electroni...
In the context of the Silicon for a Linear Collider (SiLC) R&D supported by the EUDET I3-FP6, a ...
A highly integrated Front-End readout and Data Acquisition scheme for Silicon trackers is presented....
Les détecteurs en silicium sont largement utilises en la Physique de Hautes Energies et representent...
In the context of the Silicon tracking for a Linear Collider (SiLC) R&D collaboration, a highly comp...
International audienceFor the years to come, Silicon strips detectors will be read using the smalles...