This PhD work focuses on transistor MOS miniaturisation for leading the CMOS technology to ultimate dimensions. As critical dimensions for semiconductor devices shrink too few tens of nanometers, the gate length average variation, called Line Edge Roughness (LER), becomes a critical issue. Indeed, it causes fluctuations of electrical transistor performance, which are unacceptable for future device generations. Thus, it is important to control this parameter to reduce it. For taking up this technological challenge, it is essential to measure LER accurately to understand its origin and evolution after each manufacturing technological step. First, we focused to the LER measurement with a new metrology equipment, 3D-AFM. After evaluating the ...
In this work critical process steps for NMOS transistor gate line width decrease are studied. These...
The gate spacers etching step is increasingly constrained with a reduction in the gate length of the...
L’étape de gravure des espaceurs de grille est de plus en plus exigeante avec la réduction de la lon...
This PhD work focuses on transistor MOS miniaturisation for leading the CMOS technology to ultimate ...
Ce travail de thèse s inscrit dans le contexte de miniaturisation des transistors MOS afin de mener ...
This work focuses on the understanding of the mechanisms involved in plasma etching processes used t...
In a transistor manufacturing process, patterning is one of the hardest stages to control. Along wit...
With the constant decrease of dimensions in microelectronic devices, new problemes are raised. One o...
A chaque nouvelle étape franchie dans la réduction des dimensions des dispositifs en microélectroniq...
One of the critical parameters in a system on chip manufacturing and performance is the dimension co...
Abstract—The effects of line edge roughness (LER) of nanometer scale gate pattern on the MOS transis...
As the transistors are scaled down, undesirable performance mismatch in identically designed transis...
In this work, the effects of line edge roughness (LER) of nanometer scale gate pattern, 3 sigma stan...
Ce travail de thèse vise la compréhension des mécanismes de gravure impliqués dans les procédés de g...
Line edge roughness (LER) and line width roughness (LWR) have raised questions and concerns as curre...
In this work critical process steps for NMOS transistor gate line width decrease are studied. These...
The gate spacers etching step is increasingly constrained with a reduction in the gate length of the...
L’étape de gravure des espaceurs de grille est de plus en plus exigeante avec la réduction de la lon...
This PhD work focuses on transistor MOS miniaturisation for leading the CMOS technology to ultimate ...
Ce travail de thèse s inscrit dans le contexte de miniaturisation des transistors MOS afin de mener ...
This work focuses on the understanding of the mechanisms involved in plasma etching processes used t...
In a transistor manufacturing process, patterning is one of the hardest stages to control. Along wit...
With the constant decrease of dimensions in microelectronic devices, new problemes are raised. One o...
A chaque nouvelle étape franchie dans la réduction des dimensions des dispositifs en microélectroniq...
One of the critical parameters in a system on chip manufacturing and performance is the dimension co...
Abstract—The effects of line edge roughness (LER) of nanometer scale gate pattern on the MOS transis...
As the transistors are scaled down, undesirable performance mismatch in identically designed transis...
In this work, the effects of line edge roughness (LER) of nanometer scale gate pattern, 3 sigma stan...
Ce travail de thèse vise la compréhension des mécanismes de gravure impliqués dans les procédés de g...
Line edge roughness (LER) and line width roughness (LWR) have raised questions and concerns as curre...
In this work critical process steps for NMOS transistor gate line width decrease are studied. These...
The gate spacers etching step is increasingly constrained with a reduction in the gate length of the...
L’étape de gravure des espaceurs de grille est de plus en plus exigeante avec la réduction de la lon...