AADL is dedicated to high-level design and evaluation of embedded systems. It allows describing both system structure and functional aspects via a component-based approach, e.g., GALS system. The polychronous model of computation stands out from other synchronous specification models by the fact that it allows one specifying a system whose components can have their own activation clocks. It is well adapted to support a GALS design methodology. Its framework Polychrony provides models and methods for modeling, transformation and validation of embedded systems. This thesis proposes a methodology for modeling and validation of embedded systems specified in AADL via the multi-clock synchronous programming language Signal. This methodology include...